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MSP430FR5994_17 Datasheet, PDF (54/168 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962
SLASE54A – MARCH 2016 – REVISED OCTOBER 2016
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5.11.9 ADC12_B
The ADC12_B module supports fast 12-bit analog-to-digital conversions. The module implements a 12-bit
SAR core, sample select control, and up to 32 independent conversion-and-control buffers. The
conversion-and-control buffer allows up to 32 independent analog-to-digital converter (ADC) samples to be
converted and stored without any CPU intervention.
Table 5-23 lists the power supply and input range conditions.
Table 5-23. 12-Bit ADC, Power Supply and Input Range Conditions
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
V(Ax)
I(ADC12_B)
single-ended
mode
PARAMETER
Analog input voltage range(1)
Operating supply current into
AVCC and DVCC terminals(2) (3)
TEST CONDITIONS
All ADC12 analog input pins Ax
fADC12CLK = MODCLK, ADC12ON = 1,
ADC12PWRMD = 0, ADC12DIF = 0,
REFON = 0, ADC12SHTx = 0,
ADC12DIV = 0
fADC12CLK = MODCLK, ADC12ON = 1,
ADC12PWRMD = 0, ADC12DIF = 0,
REFON = 0, ADC12SHTx = 0,
ADC12DIV = 0
VCC
3.0 V
MIN NOM MAX
0
AVCC
145 199
2.2 V
140 190
I(ADC12_B)
differential
mode
Operating supply current into
AVCC and DVCC terminals(2) (3)
fADC12CLK = MODCLK, ADC12ON = 1,
ADC12PWRMD = 0, ADC12DIF = 1,
REFON = 0, ADC12SHTx= 0,
ADC12DIV = 0
3.0 V
2.2 V
175 245
170 230
I(ADC12_B)
single-ended
low-power
mode
Operating supply current into
AVCC and DVCC terminals(2) (3)
fADC12CLK = MODCLK/4, ADC12ON = 1,
ADC12PWRMD = 1, ADC12DIF = 0,
REFON = 0, ADC12SHTx = 0,
ADC12DIV = 0
fADC12CLK = MODCLK/4, ADC12ON = 1,
ADC12PWRMD = 1, ADC12DIF = 0,
REFON = 0, ADC12SHTx = 0,
ADC12DIV = 0
3.0 V
2.2 V
85 125
83 120
I(ADC12_B)
differential
low-power
mode
CI
Operating supply current into
AVCC and DVCC terminals(2) (3)
Input capacitance
fADC12CLK = MODCLK/4, ADC12ON = 1,
ADC12PWRMD = 1, ADC12DIF = 1,
REFON = 0, ADC12SHTx= 0,
ADC12DIV = 0
Only one terminal Ax can be selected at
one time
3.0 V
2.2 V
2.2 V
110 165
109 160
10
15
RI
Input MUX ON resistance
0 V ≤ V(Ax) ≤ AVCC
>2 V
<2 V
0.5
4
1
10
(1) The analog input voltage range must be within the selected reference voltage range VR+ to VR– for valid conversion results.
(2) The internal reference supply current is not included in current consumption parameter I(ADC12_B).
(3) Approximately 60% (typical) of the total current into the AVCC and DVCC terminal is from AVCC.
UNIT
V
µA
µA
µA
µA
pF
kΩ
54
Specifications
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