MSP430FR5994_17 Datasheet, PDF (130/168 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962
SLASE54A – MARCH 2016 – REVISED OCTOBER 2016
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Table 6-54. Port P5, P6 Registers (Base Address: 0240h)
REGISTER DESCRIPTION
Port P5 input
Port P5 output
Port P5 direction
Port P5 pullup/pulldown enable
Port P5 selection 0
Port P5 selection 1
Port P5 interrupt vector word
Port P5 complement selection
Port P5 interrupt edge select
Port P5 interrupt enable
Port P5 interrupt flag
Port P6 input
Port P6 output
Port P6 direction
Port P6 pullup/pulldown enable
Port P6 selection 0
Port P6 selection 1
Port P6 complement selection
Port P6 interrupt vector word
Port P6 interrupt edge select
Port P6 interrupt enable
Port P6 interrupt flag
ACRONYM
P5IN
P5OUT
P5DIR
P5REN
P5SEL0
P5SEL1
P5IV
P5SELC
P5IES
P5IE
P5IFG
P6IN
P6OUT
P6DIR
P6REN
P6SEL0
P6SEL1
P6SELC
P6IV
P6IES
P6IE
P6IFG
OFFSET
00h
02h
04h
06h
0Ah
0Ch
0Eh
16h
18h
1Ah
1Ch
01h
03h
05h
07h
0Bh
0Dh
17h
1Eh
19h
1Bh
1Dh
Table 6-55. Port P7, P8 Registers (Base Address: 0260h)
REGISTER DESCRIPTION
Port P7 input
Port P7 output
Port P7 direction
Port P7 pullup/pulldown enable
Port P7 selection 0
Port P7 selection 1
Port P7 interrupt vector word
Port P7 complement selection
Port P7 interrupt edge select
Port P7 interrupt enable
Port P7 interrupt flag
Port P8 input
Port P8 output
Port P8 direction
Port P8 pullup/pulldown enable
Port P8 selection 0
Port P8 selection 1
Port P8 complement selection
Port P8 interrupt vector word
Port P8 interrupt edge select
Port P8 interrupt enable
Port P8 interrupt flag
ACRONYM
P7IN
P7OUT
P7DIR
P7REN
P7SEL0
P7SEL1
P7IV
P7SELC
P7IES
P7IE
P7IFG
P8IN
P8OUT
P8DIR
P8REN
P8SEL0
P8SEL1
P8SELC
P8IV
P8IES
P8IE
P8IFG
OFFSET
00h
02h
04h
06h
0Ah
0Ch
0Eh
16h
18h
1Ah
1Ch
01h
03h
05h
07h
0Bh
0Dh
17h
1Eh
19h
1Bh
1Dh
130 Detailed Description
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