MSP430FR5994_17 Datasheet, PDF (79/168 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962
SLASE54A – MARCH 2016 – REVISED OCTOBER 2016
6.12.11 TA2 and TA3
TA2 and TA3 are 16-bit timers and counters (Timer_A type) with two capture/compare registers each and
with internal connections only. Each timer can support multiple captures or compares, PWM outputs, and
interval timing (see Table 6-15 and Table 6-16). Each timer has extensive interrupt capabilities. Interrupts
may be generated from the counter on overflow conditions and from each of the capture/compare
registers. See Table 6-60 and Table 6-62 for control and configuration registers.
Table 6-15. TA2 Signal Connections
DEVICE INPUT SIGNAL MODULE INPUT NAME
COUT (internal)
ACLK (internal)
SMCLK (internal)
From Capacitive Touch
I/O 0 (internal)
TA3 CCR0 output
(internal)
ACLK (internal)
DVSS
DVCC
From Capacitive Touch
I/O 0 (internal)
COUT (internal)
DVSS
DVCC
(1) Only on devices with ADC
TACLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
GND
V_CC
CCI1A
CCI1B
GND
V_CC
MODULE BLOCK
Timer
CCR0
CCR1
MODULE OUTPUT
SIGNAL
N/A
TA0
TA1
DEVICE OUTPUT
SIGNAL
TA3 CCI0A input
ADC12(internal) ⁽¹⁾
ADC12SHSx = {5}
Table 6-16. TA3 Signal Connections
DEVICE INPUT SIGNAL MODULE INPUT NAME
COUT (internal)
ACLK (internal)
SMCLK (internal)
From Capacitive Touch
I/O 1 (internal)
TA2 CCR0 output
(internal)
ACLK (internal)
DVSS
DVCC
From Capacitive Touch
I/O 1 (internal)
COUT (internal)
DVSS
DVCC
(1) Only on devices with ADC
TACLK
ACLK
SMCLK
INCLK
CCI0A
CCI0B
GND
V_CC
CCI1A
CCI1B
GND
V_CC
MODULE BLOCK
Timer
CCR0
CCR1
MODULE OUTPUT
SIGNAL
N/A
TA0
TA1
DEVICE OUTPUT
SIGNAL
TA2 CCI0A input
ADC12(internal) ⁽¹⁾
ADC12SHSx = {6}
Copyright © 2016, Texas Instruments Incorporated
Detailed Description
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