THS3215 Datasheet, PDF (9/71 Pages) Texas Instruments – THS3215 650-MHz, Differential to Single-Ended DAC Output Amplifier

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THS3215
SBOS780A – MARCH 2016 – REVISED APRIL 2016
7.7 Electrical Characteristics: D2S + OPS
at +V_CC = 6.0 V, –V_CC = –6.0 V, 25-Ω D2S source impedance, D2S input V_IC = 0.25 V, internal path selected to OPS
(PATHSEL ≤ 0.7 V or floated), V_REF = GND, combined A_V = 5 V/V, D2S R_LOAD= 200 Ω, R_F = 249 Ω⁽¹⁾, R_G = 162 Ω (OPS A_V =
2.5 V/V), OPS enabled (DISABLE ≤ 0.7 V or floated), OPS R_LOAD = 100 Ω, and T_J ≈ 25˚C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TEST
MIN
TYP
MAX UNIT LEVEL
(2)
AC PERFORMANCE⁽³⁾
Small-signal bandwidth (SSBW)
Large-signal bandwidth (LSBW)
Bandwidth for 0.2-dB flatness
Slew rate⁽⁴⁾
Overshoot and undershoot
Rise and fall time
Settling time to 0.1%
2nd-order harmonic distortion (HD2)
3rd-order harmonic distortion (HD3)
Output voltage noise
DC PERFORMANCE⁽³⁾
V_OUT = 100 mV_PP, peaking < 1.5 dB
V_OUT = 5 V_PP
V_OUT = 2 V_PP
V_OUT = 8-V step
Input t_r = 1 ns, V_OUT = 5-V step
Input t_r = 1 ns, V_OUT = 5-V step
Input t_r = 1 ns, V_OUT = 5-V step
f = 20 MHz, V_OUT= 5 V_PP
f = 20 MHz, V_OUT= 5 V_PP
f > 200 kHz, A_V = 5 V/V
650
270
110
3000
4%
1.7
25
–66
–68
33
MHz
C
MHz
C
MHz
C
V/µs
C
C
ns
C
ns
C
dBc
C
dBc
C
nV/√Hz
C
Total gain D2S to OPS output⁽¹⁾
0.1% tolerance external resistors,
dc, ±100-mV output test
4.92
5.02
5.12 V/V
A
POWER SUPPLY (Combined D2S, OPS, and Midscale Reference Buffer)
Supply current
±6-V supplies
32.7
34.5
37.9 mA
A
Supply current temperature
coefficient
T_J = 0°C to 100°C
±5
µA/°C
C
(1) Output power stage includes an internal 18.5-kΩ feedback resistor. This internal resistor, in parallel with an external 249-Ω R_F and 162-
Ω R_G, results in a gain of 2.5 V/V after including a nominal gain loss of 0.9935 V/V due to the input buffer and loop-gain effects.
(2) Test levels (all values set by characterization and simulation): (A) 100% tested at T_A≈ T_J≈ 25°C; over temperature limits by
characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for
information.
(3) Output measured at pin 11.
(4) This slew rate is the average of the rising and falling time estimated from the large-signal bandwidth as: (Vpeak / √2) × 2π × f_–3dB.
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