THS3215 Datasheet, PDF (37/71 Pages) Texas Instruments – THS3215 650-MHz, Differential to Single-Ended DAC Output Amplifier

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THS3215
SBOS780A – MARCH 2016 – REVISED APRIL 2016
Feature Description (continued)
The feedback transimpedance (Z_OPT) can be approximated as shown in Equation 11, where R_i is the open-loop,
high-frequency impedance into the inverting node of the OPS. For a detailed derivation of Equation 11, see the
Setting Resistor Values to Optimize Bandwidth section in the OPA695 datasheet (SBOS293).
Z_OPT | R_F
§
¨¹
©
R_F
R_G
·
¸
¹
R_i
(11)
As the signal gain is varied, hold Z_OPT approximately constant to hold the ac response constant over gain.
Holding Z_OPT constant is a requirement to solve for R_F. An example of the THS3215 OPS R_F derivation is shown
in Equation 12:
R_F 430
§
¨
R_F
·
¸u
© ^RG ¹
(12)
The calculations are complicated by the internal feedback resistor value of approximately 18.5 kΩ. After the
external R_F is approximately set by the constant bandwidth consideration, the R_G must be set considering the
other gain error terms. From the noninverting input of a CFA, the total gain to the output includes a loss through
the input buffer stage (described by the CMRR) and the loop gain (LG) loss set by the typical dc open-loop
transimpedance gain and the feedback transimpedance. Extract the buffer gain from the VIN+ input to the VIN–
input from the CMRR using Equation 13. This gain loss only applies to the noninverting mode of operation and
can be ignored in inverting mode operation.
§
CMRR _·
E
¨¨©_{1 10}
20
¸
¸¹
Buffer Gain CFA
(13)
The OPS has a typical CMRR of 53 dB (buffer gain, β = 0.9978) with a tested minimum of 47 dB (minimum
buffer gain of 0.9955). The dc LG adds to the gain error. The LG is given by Equation 14, where the typical
design gain of 2.5 V/V value is also shown (the 245 Ω shown for R_F is the external 249-Ω feedback resistor in
parallel with the internal 18.5-kΩ feedback resistor).
LG
Z_OL
1.7 M
3593
R_F NG u R_i 245
u
(14)
The closed-loop output impedance with a heavy load also adds a minor gain loss that is neglected here. The
total noninverting gain is then set by Equation 15 (remember to include the internal R_F in this analysis). The R_F’
shown here is the parallel combination of the internal and external feedback resistors.
A_v
E
u
§
¨¹
R_F
·
¸
u
LG
© ^RG ¹ ^{1 LG}
(15)
Using nominal values for each term at the specified R_F = 249 Ω and R_G = 162 Ω gives the gain calculation in
Equation 16, yielding a nominal gain very close to 2.5 V/V.
A_v
0.9978
u
§
¨©¹
245.7
162
·
¸¹
u
1
3593
3593
2.51
(16)
Testing the total gain spread with the internal variation in buffer gain, open-loop transimpedance gain, internal
feedback resistor, and ±1% external resistor variation gives a worst-case gain spread of 2.5 V/V to 2.52 V/V. The
gain error is primarily dominated by the external 1% resistors. For the tighter tolerance shown in Table 1, use
0.1% precision resistors.
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