THS3215 Datasheet, PDF (40/71 Pages) Texas Instruments – THS3215 650-MHz, Differential to Single-Ended DAC Output Amplifier

THS3215
SBOS780A – MARCH 2016 – REVISED APRIL 2016
www.ti.com
Using the values of R_F and R_G listed in Table 1, a swept gain output- and input-referred noise estimate is
computed, as shown in Table 2. In this sweep, R_S = 0 Ω. The input-referred noise (E_ni) in Table 1 is at the
noninverting input of the OPS. To refer the noise to the D2S differential inputs, divide the output noise by two if
there is no interstage loss. Dividing the E_ni column by 2 V/V shows that the OPS noise contribution is negligible
when referred to the D2S inputs, where the 6-nV/√Hz differential input noise dominates. Operating with higher
feedback resistors in the OPS quickly increases the output noise due to the inverting input current noise term.
Although increasing R_F improves phase margin (for example, when driving a capacitive load), be careful to check
the total output noise using Equation 17.
Table 2. Total Input- and Output-Referred Noise of the OPS Versus Gain
TARGET GAIN
(V/V)
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5
10
BEST R_F
(Ω)
324
287
249
205
169
150
158
158
165
169
169
174
174
178
178
178
182
187
BEST R_G
(Ω)
634
280
162
102
66.5
49.9
44.2
39.2
36.5
33.2
30.1
28.7
26.7
24.9
23.2
22.1
21
20.5
E_O
(nV/√Hz)
7.63
8.07
8.72
9.39
10.42
11.48
13.01
14.21
15.53
17.04
18.42
19.63
20.83
22.51
23.89
29.41
26.54
27.77
E_in
(nV/√Hz)
5.09
4.03
3.47
3.15
2.97
2.89
2.87
2.85
2.84
2.83
2.81
2.81
2.8
2.79
2.79
2.78
2.78
2.78
Operating the OPS as an inverting amplifier is also possible. When driving the OPS directly from the D2S to the
R_G resistor, use the values shown in Table 1 for the noninverting mode in order to achieve optimal results. Note
that the R_G resistor is the load for the D2S. Operating with the D2S driving an R_G < 80 Ω increases the harmonic
distortion of the D2S. In that case, scaling up R_F and R_G in order to reduce the loading results in better system
performance at the cost of a lower OPS bandwidth. In order to reduce layout parasitics, consider splitting the R_G
resistor in two, with the first half close to VO1 and the second half close to VIN– (pin 12). Splitting R_G in this
manner places the trace capacitance inside the two resistors, thus keeping both active nodes more stable.
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