MSP430F643 Datasheet, PDF (8/106 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F643x
SLAS720B – AUGUST 2010 – REVISED AUGUST 2012
www.ti.com
TERMINAL
NAME
P2.1/P2MAP1
P2.2/P2MAP2
P2.3/P2MAP3
P2.4/P2MAP4
P2.5/P2MAP5
P2.6/P2MAP6/R03
P2.7/P2MAP7/LCDREF/R13
DVCC1
DVSS1
VCORE ⁽²⁾
P5.2/R23
LCDCAP/R33
COM0
P5.3/COM1/S42
P5.4/COM2/S41
P5.5/COM3/S40
P1.0/TA0CLK/ACLK/S39
P1.1/TA0.0/S38
Table 3. Terminal Functions (continued)
NO.
I/O ⁽¹⁾
PZ ZQW
DESCRIPTION
18 H2 I/O ^{General-purpose digital I/O with port interrupt and mappable secondary function}
Default mapping: USCI_B0 SPI slave in/master out; USCI_B0 I2C data
19 J1 I/O ^{General-purpose digital I/O with port interrupt and mappable secondary function}
Default mapping: USCI_B0 SPI slave out/master in; USCI_B0 I2C clock
20 H4 I/O ^{General-purpose digital I/O with port interrupt and mappable secondary function}
Default mapping: USCI_B0 clock input/output; USCI_A0 SPI slave transmit enable
21 J2 I/O ^{General-purpose digital I/O with port interrupt and mappable secondary function}
Default mapping: USCI_A0 UART transmit data; USCI_A0 SPI slave in/master out
22 K1 I/O ^{General-purpose digital I/O with port interrupt and mappable secondary function}
Default mapping: USCI_A0 UART receive data; USCI_A0 slave out/master in
General-purpose digital I/O with port interrupt and mappable secondary function
23 K2 I/O _{Default mapping: no secondary function}
Input/output port of lowest analog LCD voltage (V5)
General-purpose digital I/O with port interrupt and mappable secondary function
24 L2 I/O ^{Default mapping: no secondary function}
External reference voltage input for regulated LCD voltage
Input/output port of third most positive analog LCD voltage (V3 or V4)
25 L1
Digital power supply
26 M1
Digital ground supply
27 M2
Regulated core power supply (internal use only, no external current loading)
28 L3 I/O ^{General-purpose digital I/O}
Input/output port of second most positive analog LCD voltage (V2)
LCD capacitor connection
29 M3 I/O _{Input/output port of most positive analog LCD voltage (V1)}
CAUTION: LCDCAP/R33 must be connected to DV_SS if not used.
30 J4 O LCD common output COM0 for LCD backplane
General-purpose digital I/O
31 L4 I/O _{LCD common output COM1 for LCD backplane}
LCD segment output S42
General-purpose digital I/O
32 M4 I/O _{LCD common output COM2 for LCD backplane}
LCD segment output S41
General-purpose digital I/O
33 J5 I/O _{LCD common output COM3 for LCD backplane}
LCD segment output S40
General-purpose digital I/O with port interrupt
34 L5 I/O ^{Timer TA0 clock signal TACLK input}
ACLK output (divided by 1, 2, 4, 8, 16, or 32)
LCD segment output S39
General-purpose digital I/O with port interrupt
35 M5 I/O ^{Timer TA0 CCR0 capture: CCI0A input, compare: Out0 output}
BSL transmit output
LCD segment output S38
(2) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended
capacitor value, C_VCORE.
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