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MSP430F643 Datasheet, PDF (40/106 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430F643x
SLAS720B – AUGUST 2010 – REVISED AUGUST 2012
www.ti.com
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
Voltage applied at VCC to VSS
Voltage applied to any pin (excluding VCORE, VBUS, V18)(2)
Diode current at any device pin
Storage temperature range, Tstg(3)
Maximum junction temperature, TJ
–0.3 V to 4.1 V
–0.3 V to VCC + 0.3 V
±2 mA
–55°C to 150°C
95°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages referenced to VSS. VCORE is for internal device use only. No external dc loading or voltage should be applied.
(3) Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow
temperatures not higher than classified on the device label on the shipping boxes or reels.
Recommended Operating Conditions
MIN NOM MAX UNIT
PMMCOREVx = 0
1.8
Supply voltage during program execution and flash
PMMCOREVx = 0, 1
2.0
VCC
programming (AVCC1 = DVCC1 = DVCC2 = DVCC3 =
DVCC = VCC) (1) (2)
PMMCOREVx = 0, 1, 2
2.2
PMMCOREVx = 0, 1, 2, 3
2.4
3.6
3.6
V
3.6
3.6
VSS
VBAT,RTC
VBAT,MEM
TA
TJ
CBAK
CVCORE
CDVCC/
CVCORE
Supply voltage (AVSS1 = AVSS2 = AVSS3 = DVSS1 =
DVSS2 = DVSS3 = VSS)
Backup-supply voltage with RTC operational
Backup-supply voltage with backup memory retained.
Operating free-air temperature
Operating junction temperature
Capacitance at pin VBAK
Capacitor at VCORE
Capacitor ratio of DVCC to VCORE
TA = 0°C to 85°C
TA = –40°C to 85°C
TA = –40°C to 85°C
I version
I version
PMMCOREVx = 0,
1.8 V ≤ VCC ≤ 3.6 V
(default condition)
0
1.55
1.70
1.20
–40
–40
1 4.7
470
10
V
3.6
V
3.6
3.6 V
85 °C
85 °C
10 nF
nF
0
8.0
fSYSTEM
Processor frequency (maximum MCLK frequency)(3)(4)
(see Figure 1)
PMMCOREVx = 1,
2 V ≤ VCC ≤ 3.6 V
PMMCOREVx = 2,
2.2 V ≤ VCC ≤ 3.6 V
PMMCOREVx = 3,
2.4 V ≤ VCC ≤ 3.6 V
0
12.0
MHz
0
16.0
0
20.0
(1) It is recommended to power AVCC and DVCC from the same source. A maximum difference of 0.3 V between AVCC and DVCC can be
tolerated during power up and operation.
(2) The minimum supply voltage is defined by the supervisor SVS levels when it is enabled. See the PMM, SVS High Side threshold
parameters for the exact values and further details.
(3) The MSP430 CPU is clocked directly with MCLK. Both the high and low phase of MCLK must not exceed the pulse duration of the
specified maximum frequency.
(4) Modules may have a different maximum input clock specification. See the specification of the respective module in this data sheet.
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