MSP430F643 Datasheet, PDF (64/106 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F643x
SLAS720B – AUGUST 2010 – REVISED AUGUST 2012
www.ti.com
12-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V_CC
MIN TYP MAX UNIT
For specified performance of ADC12 linearity
parameters using an external reference voltage or
AVCC as reference⁽¹⁾
0.45 4.8 5.0
f_ADC12CLK ADC conversion clock
For specified performance of ADC12 linearity
parameters using the internal reference⁽²⁾
2.2 V, 3 V _0.45
2.4
4.0 ^MHz
For specified performance of ADC12 linearity
parameters using the internal reference⁽³⁾
0.45 2.4 2.7
f_ADC12OSC
Internal ADC12
oscillator ⁽⁴⁾
ADC12DIV = 0, f_ADC12CLK = f_ADC12OSC
2.2 V, 3 V
4.2 4.8 5.4 MHz
t_CONVERT Conversion time
REFON = 0, Internal oscillator,
ADC12OSC used for ADC conversion clock
2.2 V, 3 V
2.4
3.1
µs
External f_ADC12CLK from ACLK, MCLK or SMCLK,
(5)
ADC12SSEL ≠ 0
t_Sample
Sampling time
R_S = 400 Ω, R_I = 200 Ω, C_I = 20 pF,
τ = [R_S + R_I] × C_I(6)
2.2 V, 3 V 1000
ns
(1) REFOUT = 0, external reference voltage: SREF2 = 0, SREF1 = 1, SREF0 = 0. AVCC as reference voltage: SREF2 = 0, SREF1 = 0,
SREF0 = 0. The specified performance of the ADC12 linearity is ensured when using the ADC12OSC. For other clock sources, the
specified performance of the ADC12 linearity is ensured with f_ADC12CLK maximum of 5 MHz.
(2) SREF2 = 0, SREF1 = 1, SREF0 = 0, ADC12SR = 0, REFOUT = 1
(3) SREF2 = 0, SREF1 = 1, SREF0 = 0, ADC12SR = 0, REFOUT = 0. The specified performance of the ADC12 linearity is ensured when
using the ADC12OSC divided by 2.
(4) The ADC12OSC is sourced directly from MODOSC inside the UCS.
(5) 13 × ADC12DIV × 1/f_ADC12CLK
(6) Approximately ten Tau (τ) are needed to get an error of less than ±0.5 LSB:
t_Sample = ln(2ⁿ⁺¹) x (R_S + R_I) × C_I + 800 ns, where n = ADC resolution = 12, R_S = external source resistance
12-Bit ADC, Linearity Parameters Using an External Reference Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
E_I
Integral
linearity error⁽¹⁾
TEST CONDITIONS
1.4 V ≤ dVREF ≤ 1.6 V⁽²⁾
1.6 V < dVREF ⁽²⁾
V_CC
2.2 V, 3 V
MIN TYP
E_D
Differential
linearity error⁽¹⁾
(2)
E_O
Offset error⁽³⁾
dVREF ≤ 2.2 V⁽²⁾
dVREF > 2.2 V⁽²⁾
E_G
Gain error⁽³⁾
(2)
E_T
Total unadjusted
error
dVREF ≤ 2.2 V⁽²⁾
dVREF > 2.2 V⁽²⁾
2.2 V, 3 V
2.2 V, 3 V
±3
2.2 V, 3 V
±1.5
2.2 V, 3 V
±1
2.2 V, 3 V
±3.5
2.2 V, 3 V
±2
MAX
±2
±1.7
UNIT
LSB
±1 LSB
±5.6
LSB
±3.5
±2.5 LSB
±7.1
LSB
±5
(1) Parameters are derived using the histogram method.
(2) The external reference voltage is selected by: SREF2 = 0 or 1, SREF1 = 1, SREF0 = 0. dVREF = V_R+ - V_R-. V_R+ < AVCC. V_R-> AVSS.
Unless otherwise mentioned, dVREF > 1.5 V. Impedance of the external reference voltage R < 100 Ω, and two decoupling capacitors,
10 µF and 100 nF, should be connected to VREF+/VREF- to decouple the dynamic current. See also the MSP430F5xx and
MSP430F6xx Family User's Guide (SLAU208).
(3) Parameters are derived using a best fit curve.
12-Bit ADC, Linearity Parameters Using AVCC as Reference Voltage
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
E_I
Integral linearity error⁽¹⁾
E_D
Differential linearity error⁽¹⁾
TEST CONDITIONS
See ⁽²⁾
See ⁽²⁾
V_CC
2.2 V, 3 V
2.2 V, 3 V
MIN TYP
MAX
±1.7
±1
UNIT
LSB
LSB
(1) Parameters are derived using the histogram method.
(2) AVCC as reference voltage is selected by: SREF2 = 0, SREF1 = 0, SREF0 = 0.
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