MSP430F643 Datasheet, PDF (43/106 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F643x
www.ti.com
SLAS720B – AUGUST 2010 – REVISED AUGUST 2012
Low-Power Mode Supply Currents (Into V_CC) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)⁽¹⁾⁽²⁾
PARAMETER
-40°C
25°C
60°C
85°C
V_CC
PMMCOREVx
TYP
MAX
TYP
MAX
TYP
MAX
TYP
UNIT
MAX
I_LPM0,1MHz Low-power mode 0 ⁽³⁾⁽⁴⁾
2.2 V
3V
0
3
71
78
75
87
81
83
98
89
85
99
µA
94 108
I_LPM2
Low-power mode 2⁽⁵⁾⁽⁴⁾
2.2 V
3V
0
3
6.3
6.6
6.7 9.9 9.0
7.0
11
10
11
16
µA
12
18
0
1.6
1.8 2.4 4.7
6.5 10.5
2.2 V
1
1.6
1.9
4.8
6.6
2
1.7
I_LPM3,XT1LF
Low-power mode 3,
crystal mode⁽⁶⁾⁽⁴⁾
0
1.9
1
1.9
3V
2
2.0
2.0
4.9
2.1 2.7 5.0
2.1
5.1
2.2
5.2
6.7
6.8 10.8 µA
7.0
7.1
3
2.0
2.2 2.9 5.4
7.3 12.6
0
0.9
I_LPM3,
Low-power mode 3,
VLO mode, Watchdog
3V
1
0.9
VLO,WDT
enabled ^{(7) (4)}
2
1.0
3
1.0
1.2 1.9 4.0
1.2
4.1
1.3
4.2
1.3 2.2 4.3
5.9 10.3
6.0
µA
6.1
6.3 11.3
0
0.9
1.1 1.8 3.9
5.8
10
I_LPM4
Low-power mode 4⁽⁸⁾⁽⁴⁾ 3 V
1
2
0.9
1.0
1.1
1.2
4.0
4.1
5.9
µA
6.1
3
1.0
1.2 2.1 4.2
6.2
11
Low-power mode 3.5
I_LPM3.5,
RTC,VCC
(LPM3.5) current with
active RTC into primary
3V
supply pin DV_CC ⁽⁹⁾
Low-power mode 3.5
I_LPM3.5,
RTC,VBAT
(LPM3.5) current with
active RTC into backup
3V
supply pin VBAT⁽¹⁰⁾
0.5
0.8 1.4 µA
0.6
0.8 1.4 µA
I_LPM3.5,
Total low-power mode
3.5 (LPM3.5) current
3V
RTC,TOT
with active RTC⁽¹¹⁾
1.0
1.1
1.3
1.6 2.8 µA
(1) All inputs are tied to 0 V or to V_CC. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal CC4V-T1A SMD crystal with a load capacitance of 9 pF. The internal and external
load capacitance are chosen to closely match the required 9 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0); f_ACLK = 32768 Hz, f_MCLK = 0 MHz, f_SMCLK = f_DCO = 1 MHz
LDO disabled (LDOEN = 0).
(4) Current for brownout included. Low side supervisor and monitors disabled (SVS_L, SVM_L). High side supervisor and monitor disabled
(SVS_H, SVM_H). RAM retention enabled.
(5) Current for watchdog timer clocked by ACLK and RTC clocked by LFXT1 (32768 Hz) included. ACLK = low frequency crystal operation
(XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2); f_ACLK = 32768 Hz, f_MCLK = 0 MHz, f_SMCLK = f_DCO = 0 MHz; DCO
setting = 1 MHz operation, DCO bias generator enabled.
LDO disabled (LDOEN = 0).
(6) Current for watchdog timer clocked by ACLK and RTC clocked by LFXT1 (32768 Hz) included. ACLK = low frequency crystal operation
(XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f_ACLK = 32768 Hz, f_MCLK = f_SMCLK = f_DCO = 0 MHz
LDO disabled (LDOEN = 0).
(7) Current for watchdog timer clocked by VLO included.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f_ACLK = f_MCLK = f_SMCLK = f_DCO = 0 MHz
LDO disabled (LDOEN = 0).
(8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); f_DCO = f_ACLK = f_MCLK = f_SMCLK = 0 MHz
LDO disabled (LDOEN = 0).
(9) V_VBAT = V_CC - 0.2 V, f_DCO = f_MCLK = f_SMCLK = 0 MHz, f_ACLK = 32768 Hz, PMMREGOFF = 1, RTC in backup domain active
(10) V_VBAT = V_CC - 0.2 V, f_DCO = f_MCLK = f_SMCLK = 0 MHz, f_ACLK = 32768 Hz, PMMREGOFF = 1, RTC in backup domain active, no
current drawn on VBAK
(11) f_DCO = f_MCLK = f_SMCLK = 0 MHz, f_ACLK = 32768 Hz, PMMREGOFF = 1, RTC in backup domain active, no current drawn on VBAK
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