MSP430F643 Datasheet, PDF (26/106 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F643x
SLAS720B – AUGUST 2010 – REVISED AUGUST 2012
www.ti.com
Timer TB0
Timer TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers. It supports multiple
capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities. Interrupts may
be generated from the counter on overflow conditions and from each of the capture/compare registers.
INPUT PIN NUMBER
PZ
ZQW
58-P8.0
P2MAPx ⁽¹⁾
J11-P8.0
P2MAPx ⁽¹⁾
58-P8.0
P2MAPx ⁽¹⁾
50-P4.0
P2MAPx ⁽¹⁾
J11-P8.0
P2MAPx ⁽¹⁾
J9-P4.0
P2MAPx ⁽¹⁾
51-P4.1
P2MAPx ⁽¹⁾
M11-P4.1
P2MAPx ⁽¹⁾
52-P4.2
P2MAPx ⁽¹⁾
L10-P4.2
P2MAPx ⁽¹⁾
Table 18. Timer TB0 Signal Connections
DEVICE
INPUT
SIGNAL
MODULE
INPUT
SIGNAL
MODULE
BLOCK
MODULE
OUTPUT
SIGNAL
DEVICE
OUTPUT
SIGNAL
TB0CLK
TB0CLK
ACLK
ACLK
Timer
NA
NA
SMCLK
SMCLK
TB0CLK
TB0CLK
TB0.0
CCI0A
TB0.0
CCI0B
CCR0
TB0
DV_SS
GND
DV_CC
TB0.1
V_CC
CCI1A
TB0.1
CCI1B
CCR1
TB1
DV_SS
GND
DV_CC
TB0.2
TB0.2
V_CC
CCI2A
CCI2B
CCR2
TB2
DV_SS
GND
TB0.0
TB0.1
TB0.2
DV_CC
V_CC
53-P4.3
M12-P4.3
TB0.3
CCI3A
P2MAPx⁽¹⁾ P2MAPx⁽¹⁾
TB0.3
CCI3B
CCR3
TB3
DV_SS
GND
DV_CC
V_CC
54-P4.4
L12-P4.4
TB0.4
CCI4A
P2MAPx⁽¹⁾ P2MAPx⁽¹⁾
TB0.4
CCI4B
CCR4
TB4
DV_SS
GND
DV_CC
V_CC
55-P4.5
L11-P4.5
TB0.5
CCI5A
P2MAPx⁽¹⁾ P2MAPx⁽¹⁾
TB0.5
CCI5B
CCR5
TB5
DV_SS
GND
DV_CC
V_CC
56-P4.6
K11-P4.6
TB0.6
CCI6A
P2MAPx⁽¹⁾ P2MAPx⁽¹⁾
TB0.6
CCI6B
CCR6
TB6
DV_SS
GND
DV_CC
V_CC
(1) Timer functions selectable via the port mapping controller.
(2) Only on devices with peripheral module DAC12_A.
TB0.3
TB0.4
TB0.5
TB0.6
OUTPUT PIN NUMBER
PZ
ZQW
50-P4.0
P2MAPx ⁽¹⁾
J9-P4.0
P2MAPx ⁽¹⁾
ADC12 (internal)
ADC12SHSx = {2}
51-P4.1
P2MAPx ⁽¹⁾
M11-P4.1
P2MAPx ⁽¹⁾
ADC12 (internal)
ADC12SHSx = {3}
52-P4.2
L10-P4.2
P2MAPx⁽¹⁾ P2MAPx⁽¹⁾
DAC12_A ⁽²⁾
DAC12_0, DAC12_1
(internal)
53-P4.3
P2MAPx ⁽¹⁾
M12-P4.3
P2MAPx ⁽¹⁾
54-P4.4
P2MAPx ⁽¹⁾
L12-P4.4
P2MAPx ⁽¹⁾
55-P4.5
P2MAPx ⁽¹⁾
L11-P4.5
P2MAPx ⁽¹⁾
56-P4.6
P2MAPx ⁽¹⁾
K11-P4.6
P2MAPx ⁽¹⁾
26
Copyright © 2010–2012, Texas Instruments Incorporated