DS90UH925Q Datasheet, PDF (7/47 Pages) Texas Instruments – 720p 24-bit Color FPD-Link III Serializer with HDCP

DS90UH925Q
DC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2, Note 3, Note 4)
Symbol
Parameter
Conditions
Pin/Freq. Min Typ Max
LVCMOS I/O DC SPECIFICATIONS
V_IH
High Level Input Voltage
V_DDIO = 3.0 to 3.6V
2.0
V_DDIO
V_IL
Low Level Input Voltage
V_DDIO = 3.0 to 3.6V
PDB
GND
0.8
I_IN
Input Current
V_IN = 0V or V_DDIO = 3.0 to 3.6V
−10
±1
+10
V_DDIO = 3.0 to 3.6V
2.0
V_DDIO
V_IH
High Level Input Voltage
V_DDIO = 1.71 to 1.89V
R[7:0], G
[7:0], B[7:0],
0.65*
V_DDIO
V_DDIO
V_DDIO = 3.0 to 3.6V
HS, VS, DE, ^GND
0.8
V_IL
Low Level Input Voltage
V_DDIO = 1.71 to 1.89V
PCLK,
I2S_CLK,
GND
0.35*
V_DDIO
I_IN
Input Current
V_IN = 0V or
V_DDIO
V_DDIO = 3.0
to 3.6V
V_DDIO = 1.71
I2S_WC,
I2S_DA,
I2S_DB
−10
±1
+10
−10
±1
+10
to 1.89V
V_DDIO = 3.0 to
3.6V
V_OH
High Level Output Voltage
I_OH = −4mA
V_DDIO = 1.71
2.4
V_DDIO -
to 1.89V
0.45
V_DDIO = 3.0 to
3.6V
GPIO[3:0],
GPO_REG
GND
V_OL
Low Level Output Voltage
I_OL = +4mA
[8:4]
V_DDIO = 1.71
GND
to 1.89V
V_DDIO
V_DDIO
0.4
0.35
I_OS
Output Short Circuit Current V_OUT = 0V
I_OZ
TRI-STATE® Output Current V_OUT = 0V or V_DDIO, PDB = L,
FPD-LINK III CML DRIVER DC SPECIFICATIONS
−50
−10
+10
V_ODp-p
Differential Output Voltage
(DOUT+) – (DOUT-)
R_L = 100Ω, Figure 1
1160 1250 1340
ΔV_OD
V_OS
ΔV_OS
Output Voltage Unbalance
Offset Voltage – Single-ended R_L = 100Ω, Figure 1
Offset Voltage Unbalance
Single-ended
DOUT+,
DOUT-
1
50
2.5-0.2
5*V_ODp-
p (TYP)
1
50
I_OS
Output Short Circuit Current DOUT+/- = 0V, PDB = L or H
R_T
Internal Termination Resistor
- Single ended
−38
40
52
62
Units
V
V
μA
V
V
V
V
μA
μA
V
V
V
V
mA
μA
mVp-p
mV
V
mV
mA
Ω
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