DS90UH925Q Datasheet, PDF (27/47 Pages) Texas Instruments – 720p 24-bit Color FPD-Link III Serializer with HDCP

DS90UH925Q
ADD
(dec)
4
ADD
(hex)
0x04
Register
Name
Configuration
[1]
Bit(s)
7
6
5
4
3
2
1
0
Register
Type
RW
RW
RW
RW
RW
RW
Default
(hex)
0x80
Function Description
Failsafe
State
Input Failsafe State
1: Failsafe to Low
0: Failsafe to High
Reserved
CRC Error Clear back channel CRC Error Counters
Reset
This bit is NOT self-clearing
1: Clear Counters
0: Normal Operation
Reserved
Backward Backward Compatible (BC) mode set by
Compatibl MODE_SEL pin or register
e select by 1: BC is set by register bit. Use register bit
pin or
reg_0x04[2] to set BC Mode
register 0: BC is set by MODE_SEL pin.
control
Backward
Compatibl
e Mode
Select
Backward compatible (BC) mode to
DS90UR906Q or DS90UR908Q, if
reg_0x04[3] = 1
1: Backward compatible with DS90UR906Q or
DS90UR908Q
0: Backward Compatible is OFF (default)
LFMODE
select by
pin or
register
control
Frequency range is set by MODE_SEL pin or
register
1: Frequency range is set by register. Use register
bit reg_0x04[0] to set LFMODE
0: Frequency range is set by MODE_SEL pin.
LFMODE
Frequency range select
1: PCLK range = 5MHz - <15 MHz), if
reg_0x04[1] = 1
0: PCLK range = 15MHz - 85MHz (default)
Copyright © 1999-2012, Texas Instruments Incorporated
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