LM3S1968 Datasheet, PDF (661/709 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S1968 Microcontroller
Figure 21-7. Brown-Out Reset Timing
R2
VDD
/BOR
(Internal)
/Reset
(Internal)
R4
R6
Figure 21-8. Software Reset Timing
SW Reset
R8
/Reset
(Internal)
Figure 21-9. Watchdog Reset Timing
WDOG
Reset
(Internal)
R9
/Reset
(Internal)
21.2.5
21.2.6
Sleep Modes
Table 21-15. Sleep Modes AC Characteristics^a
Parameter No Parameter
Parameter Name
Min Nom
D1
t_{WAKE_S}
Time to wake from interrupt in sleep or
-
-
deep-sleep mode, not using the PLL
D2
t_{WAKE_PLL_S} Time to wake from interrupt in sleep or
-
-
deep-sleep mode when using the PLL
a. Values in this table assume the IOSC is the clock source during sleep or deep-sleep mode.
Max
7
T_READY
Unit
system clocks
ms
Hibernation Module
The Hibernation Module requires special system implementation considerations since it is intended
to power-down all other sections of its host device. The system power-supply distribution and
interfaces to the device must be driven to 0 V_DC or powered down with the same external voltage
regulator controlled by HIB.
The external voltage regulators controlled by HIB must have a settling time of 250 μs or less.
July 15, 2014
661
Texas Instruments-Production Data