LM3S1968 Datasheet, PDF (242/709 Pages) List of Unclassifed Manufacturers – Microcontroller

Hibernation Module
Figure 6-3. Clock Source Using Dedicated Oscillator
Input
Voltage
Regulator
or Switch
IN OUT
EN
Clock
Source
(f_{EXT_OSC})
N.C.
Stellaris Microcontroller
VDD
XOSC0
XOSC1
6.3.3
6.3.4
R_PU
Open drain
external wake
up circuit
HIB
WAKE
VBAT
GND
3V
Battery
Note: R_PU = Pull-up resistor (1 M½).
Battery Management
The Hibernation module can be independently powered by a battery or an auxiliary power source.
The module can monitor the voltage level of the battery and detect when the voltage drops below
V_LOWBAT. When this happens, an interrupt can be generated. The module can also be configured
so that it will not go into Hibernate mode if the battery voltage drops below this threshold. Battery
voltage is not measured while in Hibernate mode.
Important: System level factors may affect the accuracy of the low battery detect circuit. The
designer should consider battery type, discharge characteristics, and a test load during
battery voltage measurements.
Note that the Hibernation module draws power from whichever source (V_BAT or V_DD) has the higher
voltage. Therefore, it is important to design the circuit to ensure that V_DD is higher that V_BAT under
nominal conditions or else the Hibernation module draws power from the battery even when V_DD is
available.
The Hibernation module can be configured to detect a low battery condition by setting the LOWBATEN
bit of the HIBCTL register. In this configuration, the LOWBAT bit of the HIBRIS register will be set
when the battery level is low. If the VABORT bit is also set, then the module is prevented from entering
Hibernation mode when a low battery is detected. The module can also be configured to generate
an interrupt for the low-battery condition (see “Interrupts and Status” on page 244).
Real-Time Clock
The Hibernation module includes a 32-bit counter that increments once per second with a proper
clock source and configuration (see “Clock Source” on page 241). The 32.768-kHz clock signal is
fed into a predivider register which counts down the 32.768-kHz clock ticks to achieve a once per
second clock rate for the RTC. The rate can be adjusted to compensate for inaccuracies in the clock
source by using the predivider trim register, HIBRTCT. This register has a nominal value of 0x7FFF,
and is used for one second out of every 64 seconds to divide the input clock. This allows the software
to make fine corrections to the clock rate by adjusting the predivider trim register up or down from
0x7FFF. The predivider trim should be adjusted up from 0x7FFF in order to slow down the RTC
rate, and down from 0x7FFF in order to speed up the RTC rate.
242
July 15, 2014
Texas Instruments-Production Data