LM3S1968 Datasheet, PDF (286/709 Pages) List of Unclassifed Manufacturers – Microcontroller

General-Purpose Input/Outputs (GPIOs)
8 General-Purpose Input/Outputs (GPIOs)
The GPIO module is composed of eight physical GPIO blocks, each corresponding to an individual
GPIO port (Port A, Port B, Port C, Port D, Port E, Port F, Port G, Port H). The GPIO module supports
5-52 programmable input/output pins, depending on the peripherals being used.
The GPIO module has the following features:
■ 5-52 GPIOs, depending on configuration
■ 5-V-tolerant in input configuration
■ Fast toggle capable of a change every two clock cycles
■ Programmable control for GPIO interrupts
– Interrupt generation masking
– Edge-triggered on rising, falling, or both
– Level-sensitive on High or Low values
■ Bit masking in both read and write operations through address lines
■ Can initiate an ADC sample sequence
■ Pins configured as digital inputs are Schmitt-triggered.
■ Programmable control for GPIO pad configuration
– Weak pull-up or pull-down resistors
– 2-mA, 4-mA, and 8-mA pad drive for digital communication; up to four pads can be configured
with an 18-mA pad drive for high-current applications
– Slew rate control for the 8-mA drive
– Open drain enables
– Digital input enables
8.1 Signal Description
GPIO signals have alternate hardware functions. Table 8-4 on page 289 and Table 8-5 on page 291
list the GPIO pins and the analog and digital alternate functions. The AINx analog signals are not
5-V tolerant and go through an isolation circuit before reaching their circuitry. These signals are
configured by clearing the corresponding DEN bit in the GPIO Digital Enable (GPIODEN) register.
Other analog signals are 5-V tolerant and are connected directly to their circuitry (C0-, C0+, C1-,
C1+, C2-, C2+). These signals are configured by clearing the DEN bit in the GPIO Digital Enable
(GPIODEN) register. The digital alternate hardware functions are enabled by setting the appropriate
bit in the GPIO Alternate Function Select (GPIOAFSEL) and GPIODEN registers and configuring
the PMCx bit field in the GPIO Port Control (GPIOPCTL) register to the numeric enoding shown in
the table below. Note that each pin must be programmed individually; no type of grouping is implied
by the columns in the table.
286
July 15, 2014
Texas Instruments-Production Data