LM3S1968 Datasheet, PDF(292/709 Page) List of Unclassifed Manufacturers – Microcontroller

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LM3S1968 Datasheet, PDF (292/709 Pages) List of Unclassifed Manufacturers – Microcontroller

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General-Purpose Input/Outputs (GPIOs)

Table 8-5. GPIO Signals (108BGA) (continued)

Pin Name

Pin Number Pin Type Buffer Typea Description

PD3

H1

I/O

TTL

GPIO port D bit 3.

PE0

A11

I/O

TTL

GPIO port E bit 0.

PE1

B12

I/O

TTL

GPIO port E bit 1.

PE2

B11

I/O

TTL

GPIO port E bit 2.

PE3

A12

I/O

TTL

GPIO port E bit 3.

PF0

M9

I/O

TTL

GPIO port F bit 0.

PF1

H12

I/O

TTL

GPIO port F bit 1.

PF2

J11

I/O

TTL

GPIO port F bit 2.

PF3

J12

I/O

TTL

GPIO port F bit 3.

PF4

L9

I/O

TTL

GPIO port F bit 4.

PF5

L8

I/O

TTL

GPIO port F bit 5.

PF6

M8

I/O

TTL

GPIO port F bit 6.

PF7

K4

I/O

TTL

GPIO port F bit 7.

PG0

K1

I/O

TTL

GPIO port G bit 0.

PG1

K2

I/O

TTL

GPIO port G bit 1.

PG2

J1

I/O

TTL

GPIO port G bit 2.

PG3

J2

I/O

TTL

GPIO port G bit 3.

PG4

K3

I/O

TTL

GPIO port G bit 4.

PG5

M7

I/O

TTL

GPIO port G bit 5.

PG6

L7

I/O

TTL

GPIO port G bit 6.

PG7

C10

I/O

TTL

GPIO port G bit 7.

PH0

C9

I/O

TTL

GPIO port H bit 0.

PH1

C8

I/O

TTL

GPIO port H bit 1.

PH2

D11

I/O

TTL

GPIO port H bit 2.

PH3

D10

I/O

TTL

GPIO port H bit 3.

a. The TTL designation indicates the pin has TTL-compatible voltage levels.

8.2 Functional Description

Important: All GPIO pins are tri-stated by default (GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0,

and GPIOPUR=0), with the exception of the five JTAG/SWD pins (PB7 and PC[3:0]).

The JTAG/SWD pins default to their JTAG/SWD functionality (GPIOAFSEL=1,

GPIODEN=1 and GPIOPUR=1). A Power-On-Reset (POR) or asserting RST puts both

groups of pins back to their default state.

While debugging systems where PB7 is being used as a GPIO, care must be taken to

ensure that a low value is not applied to the pin when the part is reset. Because PB7

reverts to the TRST function after reset, a Low value on the pin causes the JTAG

controller to be reset, resulting in a loss of JTAG communication.

Each GPIO port is a separate hardware instantiation of the same physical block (see Figure

8-1 on page 293). The LM3S1968 microcontroller contains eight ports and thus eight of these physical

GPIO blocks.

292

July 15, 2014

Texas Instruments-Production Data

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