LM3S1968 Datasheet, PDF (567/709 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S1968 Microcontroller
Figure 16-3. PWM Count-Down Mode
Load
CompA
CompB
Zero
Load
Zero
A
B
Dir
BDown
ADown
Figure 16-4. PWM Count-Up/Down Mode
Load
CompA
CompB
Zero
Load
Zero
A
B
Dir
16.3.3
BUp
AUp
BDown
ADown
PWM Signal Generator
The PWM generator takes these pulses (qualified by the direction signal), and generates two PWM
signals. In Count-Down mode, there are four events that can affect the PWM signal: zero, load,
match A down, and match B down. In Count-Up/Down mode, there are six events that can affect
the PWM signal: zero, load, match A down, match A up, match B down, and match B up. The match
A or match B events are ignored when they coincide with the zero or load events. If the match A
and match B events coincide, the first signal, PWMA, is generated based only on the match A event,
and the second signal, PWMB, is generated based only on the match B event.
For each event, the effect on each output PWM signal is programmable: it can be left alone (ignoring
the event), it can be toggled, it can be driven Low, or it can be driven High. These actions can be
used to generate a pair of PWM signals of various positions and duty cycles, which do or do not
overlap. Figure 16-5 on page 568 shows the use of Count-Up/Down mode to generate a pair of
center-aligned, overlapped PWM signals that have different duty cycles.
July 15, 2014
567
Texas Instruments-Production Data