LM3S1968 Datasheet, PDF (13/709 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S1968 Microcontroller
List of Tables
Table 1.
Table 2.
Table 2-1.
Table 2-2.
Table 2-3.
Table 2-4.
Table 2-5.
Table 2-6.
Table 2-7.
Table 2-8.
Table 2-9.
Table 2-10.
Table 2-11.
Table 2-12.
Table 2-13.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
Table 5-1.
Table 5-2.
Table 5-3.
Table 5-4.
Table 5-5.
Table 5-6.
Table 5-7.
Table 5-8.
Table 6-1.
Table 6-2.
Table 6-3.
Table 7-1.
Table 7-2.
Table 7-3.
Table 8-1.
Table 8-2.
Table 8-3.
Table 8-4.
Revision History .................................................................................................. 24
Documentation Conventions ................................................................................ 32
Summary of Processor Mode, Privilege Level, and Stack Use ................................ 57
Processor Register Map ....................................................................................... 58
PSR Register Combinations ................................................................................. 63
Memory Map ....................................................................................................... 71
Memory Access Behavior ..................................................................................... 73
SRAM Memory Bit-Banding Regions .................................................................... 76
Peripheral Memory Bit-Banding Regions ............................................................... 76
Exception Types .................................................................................................. 81
Interrupts ............................................................................................................ 82
Exception Return Behavior ................................................................................... 87
Faults ................................................................................................................. 88
Fault Status and Fault Address Registers .............................................................. 89
Cortex-M3 Instruction Summary ........................................................................... 91
Core Peripheral Register Regions ......................................................................... 94
Memory Attributes Summary ................................................................................ 97
TEX, S, C, and B Bit Field Encoding ................................................................... 100
Cache Policy for Memory Attribute Encoding ....................................................... 101
AP Bit Field Encoding ........................................................................................ 101
Memory Region Attributes for Stellaris Microcontrollers ........................................ 101
Peripherals Register Map ................................................................................... 102
Interrupt Priority Levels ...................................................................................... 127
Example SIZE Field Values ................................................................................ 155
JTAG_SWD_SWO Signals (100LQFP) ................................................................ 159
JTAG_SWD_SWO Signals (108BGA) ................................................................. 160
JTAG Port Pins Reset State ............................................................................... 160
JTAG Instruction Register Commands ................................................................. 167
System Control & Clocks Signals (100LQFP) ...................................................... 171
System Control & Clocks Signals (108BGA) ........................................................ 171
Reset Sources ................................................................................................... 172
Clock Source Options ........................................................................................ 177
Possible System Clock Frequencies Using the SYSDIV Field ............................... 180
Examples of Possible System Clock Frequencies Using the SYSDIV2 Field .......... 180
System Control Register Map ............................................................................. 184
RCC2 Fields that Override RCC fields ................................................................. 199
Hibernate Signals (100LQFP) ............................................................................. 239
Hibernate Signals (108BGA) .............................................................................. 240
Hibernation Module Register Map ....................................................................... 246
Flash Protection Policy Combinations ................................................................. 260
User-Programmable Flash Memory Resident Registers ....................................... 264
Flash Register Map ............................................................................................ 264
GPIO Pins With Non-Zero Reset Values .............................................................. 287
GPIO Pins and Alternate Functions (100LQFP) ................................................... 287
GPIO Pins and Alternate Functions (108BGA) ..................................................... 288
GPIO Signals (100LQFP) ................................................................................... 289
July 15, 2014
13
Texas Instruments-Production Data