LM3S1968 Datasheet, PDF (178/709 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
offer additional encodings over the RCC register. When used, the RCC2 register field values are
used by the logic over the corresponding field in the RCC register. In particular, RCC2 provides for
a larger assortment of clock configuration options. These registers control the following clock
functionality:
■ Source of clocks in sleep and deep-sleep modes
■ System clock derived from PLL or other clock source
■ Enabling/disabling of oscillators and PLL
■ Clock divisors
■ Crystal input selection
Figure 5-5 on page 179 shows the logic for the main clock tree. The peripheral blocks are driven by
the system clock signal and can be individually enabled/disabled. The ADC clock signal is
automatically divided down to 16 MHz for proper ADC operation. The PWM clock signal is a
synchronous divide of the system clock to provide the PWM circuit with more range (set with PWMDIV
in RCC).
Note: When the ADC module is in operation, the system clock must be at least 16 MHz.
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July 15, 2014
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