LM3S1968 Datasheet, PDF (21/709 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S1968 Microcontroller
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UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 444
UART Flag (UARTFR), offset 0x018 ................................................................................ 446
UART IrDA Low-Power Register (UARTILPR), offset 0x020 ............................................. 448
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 449
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 450
UART Line Control (UARTLCRH), offset 0x02C ............................................................... 451
UART Control (UARTCTL), offset 0x030 ......................................................................... 453
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 455
UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 457
UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 459
UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 460
UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 461
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 463
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 464
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 465
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 466
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 467
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 468
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 469
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 470
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 471
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 472
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 473
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 474
Synchronous Serial Interface (SSI) ............................................................................................ 475
Register 1: SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 488
Register 2: SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 490
Register 3: SSI Data (SSIDR), offset 0x008 ...................................................................................... 492
Register 4: SSI Status (SSISR), offset 0x00C ................................................................................... 493
Register 5: SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 495
Register 6: SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 496
Register 7: SSI Raw Interrupt Status (SSIRIS), offset 0x018 .............................................................. 498
Register 8: SSI Masked Interrupt Status (SSIMIS), offset 0x01C ........................................................ 499
Register 9: SSI Interrupt Clear (SSIICR), offset 0x020 ....................................................................... 500
Register 10: SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0 ............................................. 501
Register 11: SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4 ............................................. 502
Register 12: SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8 ............................................. 503
Register 13: SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 504
Register 14: SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 505
Register 15: SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 506
Register 16: SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 507
Register 17: SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 508
Register 18: SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 509
Register 19: SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 510
Register 20: SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 511
Register 21: SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 512
Inter-Integrated Circuit (I²C) Interface ........................................................................................ 513
Register 1: I²C Master Slave Address (I2CMSA), offset 0x000 ........................................................... 529
July 15, 2014
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