DS125BR820 Datasheet, PDF (6/62 Pages) Texas Instruments – Low-Power 12.5 Gbps 8-Channel Linear Repeater

DS125BR820
SNLS491B – JULY 2014 – REVISED FEBRUARY 2015
www.ti.com
Pin Functions⁽¹⁾ (continued)
PIN
NAME
NO.
I/O, TYPE
PIN DESCRIPTION
CONTROL PINS — BOTH PIN AND SMBUS MODES (LVCMOS)
RXDET
The RXDET pin controls the input enable function. Depending on the
input level, a 50 Ω or >50 kΩ termination to the power rail is enabled.
22
I, 4-LEVEL,
LVCMOS
Pull up pin to VDD (2.5 V mode) or VIN (3.3 V mode) through 1 kΩ
resistor to provide a 50 Ω termination to the power rail for normal
operation.
See Table 2.
RESERVED1
23
I, 4-LEVEL,
LVCMOS
Reserved
This input must be left floating.
VDD_SEL
Controls the internal regulator
25
I, FLOAT
Float = 2.5 V mode
Tie to GND = 3.3 V mode
PWDN
Tie High = Low power - Power Down
52
I, LVCMOS
Tie to GND = Normal Operation
See Table 2.
ALL_DONE
27
O, LVCMOS
Valid Register Load Status Output
HIGH = External EEPROM load failed or incomplete
LOW = External EEPROM load passed
POWER
VIN
24
Power
In 3.3 V mode, feed 3.3 V to VIN
In 2.5 V mode, leave floating.
VDD
9, 14, 36, 41, 51 Power
Power Supply for CML and Analog Pins
2.5 V mode, connect to 2.5 V
3.3 V mode, connect 0.1 µF cap to each VDD Pin and GND
See Power Supply Recommendations for proper power supply
decoupling .
GND
DAP
Power
Ground pad (DAP - die attach pad).
6
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