DS125BR820 Datasheet, PDF (48/62 Pages) Texas Instruments – Low-Power 12.5 Gbps 8-Channel Linear Repeater

DS125BR820
SNLS491B – JULY 2014 – REVISED FEBRUARY 2015
Typical Applications (continued)
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Time (16.16 ps/DIV)
DS125BR820 Settings: EQA = Level 3, VODA = Level 6
Figure 37. nPPI Eye Mask Performance with 15 Inch 5-Mil
FR4 Input Trace, Test Pattern = PRBS-9, 10.3125 Gbps
DS125BR820 Settings: EQA = Level 3, VODA = Level 6
Figure 38. nPPI Jitter Performance with 15 Inch 5-Mil FR4
Input Trace, Test Pattern = PRBS-9, 10.3125 Gbps
8.2.3 PCIe Board Applications (PCIe Gen-3)
The DS125BR820 can be used to extend trace length on motherboards and line cards in PCIe Gen-3
applications. The high linearity of the DS125BR820 aids in the link training protocol required by PCIe Gen-3 at 8
Gbps in accordance with PCI-SIG standards. For PCIe Gen-3, preservation of the pre-cursor and post-cursor Tx
FIR presets (P1-P10) is crucial to successful signal transmission from motherboard system root complex to line
card ASIC or Embedded Processor. Below is a typical example of the DS125BR820 used in a PCIe application:
8
TX
Connector
8
RX
DS125BR820
ASIC
or
PCIe EP
System Board
Root Complex
8
RX
DS125BR820
Connector
8
TX
BoTarardce
Figure 39. Typical PCIe Gen-3 Configuration Diagram
8.2.3.1 Design Requirements
As with any high speed design, there are many factors that influence the overall performance. Please reference
Design Requirements in the Generic High Speed Repeater application section for a list of critical areas for
consideration and study during design.
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