DS125BR820 Datasheet, PDF (2/62 Pages) Texas Instruments – Low-Power 12.5 Gbps 8-Channel Linear Repeater

DS125BR820
SNLS491B – JULY 2014 – REVISED FEBRUARY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 7
6.1 Absolute Maximum Ratings ...................................... 7
6.2 ESD Ratings.............................................................. 7
6.3 Recommended Operating Conditions....................... 7
6.4 Thermal Information ................................................. 7
6.5 Electrical Characteristics........................................... 8
6.6 Electrical Characteristics — Serial Bus Interface DC
Specifications ........................................................... 10
6.7 Serial Bus Interface Timing Specifications ........ 10
6.8 Typical Characteristics ............................................ 12
7 Detailed Description ............................................ 13
7.1 Overview ................................................................. 13
7.2 Functional Block Diagram ....................................... 13
7.3 Feature Description................................................. 14
7.4 Device Functional Modes........................................ 14
7.5 Signal Conditioning Settings ................................... 15
7.6 Programming........................................................... 17
7.7 Register Maps ......................................................... 25
8 Applications and Implementation ...................... 40
8.1 Application Information............................................ 40
8.2 Typical Applications ................................................ 41
9 Power Supply Recommendations...................... 52
10 Layout................................................................... 53
10.1 Layout Guidelines ................................................. 53
10.2 Layout Example .................................................... 53
11 Device and Documentation Support ................. 54
11.1 Trademarks ........................................................... 54
11.2 Electrostatic Discharge Caution ............................ 54
11.3 Glossary ................................................................ 54
12 Mechanical, Packaging, and Orderable
Information ........................................................... 54
4 Revision History
Changes from Revision A (September 2014) to Revision B
Page
• Added data type for all differential high speed I/O ................................................................................................................ 4
• Changed pin assignment numbers for OUTB_2+/- and OUTB_3+/- to correct typo.............................................................. 4
• Changed ENSMB pin type to 4-level LVCMOS per input pin behavior.................................................................................. 4
• Changed Handling Ratings table to ESD Ratings table ........................................................................................................ 7
• Changed register map rows to combine multiple consecutive registers with a value of all zeros and no EEPROM-
relevant bits .......................................................................................................................................................................... 28
Changes from Original (July 2014) to Revision A
Page
• Added release of the full document ....................................................................................................................................... 1
2
Submit Documentation Feedback
Copyright © 2014–2015, Texas Instruments Incorporated