DRV8302_16 Datasheet, PDF (5/32 Pages) Texas Instruments – Three Phase Gate Driver

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NO.
52
53, 54
PIN
NAME
BST_BK
PVDD2
55
EN_BUCK
56
SS_TR
57
GND
(PWR_PAD)
DRV8302
SLES267C – AUGUST 2011 – REVISED MARCH 2016
Pin Functions (continued)
I/O ⁽¹⁾
DESCRIPTION
P Bootstrap cap pin for buck converter
P Power supply pin for buck converter, PVDD2 cap should connect to GND.
I
Enable buck converter. Internal pullup current source. Pull below 1.2 V to disable. Float to enable.
Adjust the input undervoltage lockout with two resistors
Buck soft-start and tracking. An external capacitor connected to this pin sets the output rise time. Since
I
the voltage on this pin overrides the internal reference, it can be used for tracking and sequencing. Cap
should connect to GND
GND pin. The exposed power pad must be electrically connected to ground plane through soldering to
P PCB for proper operation and connected to bottom side of PCB through vias for better thermal
spreading.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
MIN
MAX
UNIT
V_PVDD
PVDD_RAMP
V_PGND
I_{IN_MAX}
I_{IN_OD_MAX}
V_{OPA_IN}
V_LOGIC
Supply voltage
Relative to PGND
Maximum supply voltage ramp rate
Voltage rising up to PVDD_MAX
Maximum voltage between PGND and GND
Maximum current, all digital and analog input pins except nFAULT and nOCTW pins
Maximum sinking current for open-drain pins (nFAULT and nOCTW Pins)
Voltage range for SPx and SNx pins
Input voltage range for logic/digital pins (INH_A, INL_A, INH_B, INL_B, INH_C, INL_C,
EN_GATE, M_PWM, M_OC, OC_ADJ, GAIN, DC_CAL)
–0.3
–0.3
–1
–0.6
–0.3
65
V
1
V/µs
0.3
V
1
mA
7
mA
0.6
V
7
V
V_GVDD
V_AVDD
V_DVDD
V_REF
I_REF
T_J
T_stg
Maximum voltage for GVDD pin
Maximum voltage for AVDD pin
Maximum voltage for DVDD pin
Maximum reference voltage for current amplifier
Maximum current for REF Pin
Maximum operating junction temperature
Storage temperature
13.2
V
8
V
3.6
V
7
V
100
µA
–40
150
°C
–55
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V_(ESD)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾
VALUE
±2000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
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