DRV8302_16 Datasheet, PDF (4/32 Pages) Texas Instruments – Three Phase Gate Driver

DRV8302
SLES267C – AUGUST 2011 – REVISED MARCH 2016
www.ti.com
PIN
NO.
NAME
13
GVDD
14
CP1
15
CP2
16
EN_GATE
17
INH_A
18
INL_A
19
INH_B
20
INL_B
21
INH_C
22
INL_C
23
DVDD
24
REF
25
SO1
26
SO2
27
AVDD
28
AGND
29
PVDD1
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50, 51
SP2
SN2
SP1
SN1
SL_C
GL_C
SH_C
GH_C
BST_C
SL_B
GL_B
SH_B
GH_B
BST_B
SL_A
GL_A
SH_A
GH_A
BST_A
BIAS
PH
Pin Functions (continued)
I/O ⁽¹⁾
DESCRIPTION
P Internal gate driver voltage regulator. GVDD cap should connect to GND
P Charge pump pin 1, ceramic cap should be used between CP1 and CP2
P Charge pump pin 2, ceramic cap should be used between CP1 and CP2
I
Enable gate driver and current shunt amplifiers. Control buck via EN_BUCK pin.
I
PWM Input signal (high side), half-bridge A
I
PWM Input signal (low side), half-bridge A
I
PWM Input signal (high side), half-bridge B
I
PWM Input signal (low side), half-bridge B
I
PWM Input signal (high side), half-bridge C
I
PWM Input signal (low side), half-bridge C
P
Internal 3.3-V supply voltage. DVDD cap should connect to AGND. This is an output, but not specified
to drive external circuitry.
I
Reference voltage to set output of shunt amplfiiers with a bias voltage which equals to half of the
voltage set on this pin. Connect to ADC reference in microcontroller.
O Output of current amplifier 1
O Output of current amplifier 2
P
Internal 6-V supply voltage, AVDD cap should connect to AGND. This is an output, but not specified to
drive external circuitry.
P Analog ground pin
P
Power supply pin for gate driver and current shunt amplifier. PVDD1 is independent of buck power
supply, PVDD2. PVDD1 cap should connect to GND
I
Input of current amplifier 2 (connecting to positive input of amplifier). Recommend to connect to ground
side of the sense resistor for the best commom mode rejection.
I
Input of current amplifier 2 (connecting to negative input of amplifier).
I
Input of current amplifier 1 (connecting to positive input of amplifier). Recommend to connect to ground
side of the sense resistor for the best commom mode rejection.
I
Input of current amplifier 1 (connecting to negative input of amplifier).
I
Low-Side MOSFET source connection, half-bridge C. Low-side V_DS measured between this pin and
SH_C.
O Gate drive output for Low-Side MOSFET, half-bridge C
I
High-Side MOSFET source connection, half-bridge C. High-side V_DS measured between this pin and
PVDD1.
O Gate drive output for High-Side MOSFET, half-bridge C
P Bootstrap cap pin for half-bridge C
I
Low-Side MOSFET source connection, half-bridge B. Low-side V_DS measured between this pin and
SH_B.
O Gate drive output for Low-Side MOSFET, half-bridge B
I
High-Side MOSFET source connection, half-bridge B. High-side V_DS measured between this pin and
PVDD1.
O Gate drive output for High-Side MOSFET, half-bridge B
P Bootstrap cap pin for half-bridge B
I
Low-Side MOSFET source connection, half-bridge A. Low-side V_DS measured between this pin and
SH_A.
O Gate drive output for Low-Side MOSFET, half-bridge A
I
High-Side MOSFET source connection, half-bridge A. High-side V_DS measured between this pin and
PVDD1.
O Gate drive output for High-Side MOSFET, half-bridge A
P Bootstrap cap pin for half-bridge A
I
Bias pin. Connect 1M-Ω resistor to GND, or 0.1 µF capacitor to GND.
O The source of the internal high side MOSFET of buck converter
4
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