DRV8302_16 Datasheet, PDF (2/32 Pages) Texas Instruments – Three Phase Gate Driver

DRV8302
SLES267C – AUGUST 2011 – REVISED MARCH 2016
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Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 6
6.4 Thermal Information .................................................. 6
6.5 Electrical Characteristics........................................... 7
6.6 Gate Timing and Protection Characteristics ............. 8
6.7 Current Shunt Amplifier Characteristics.................... 8
6.8 Buck Converter Characteristics ................................ 9
6.9 Typical Characteristics ............................................ 10
7 Detailed Description ............................................ 11
7.1 Overview ................................................................. 11
7.2 Function Block Diagram.......................................... 12
7.3 Feature Description................................................. 13
7.4 Device Functional Modes........................................ 19
8 Application and Implementation ........................ 20
8.1 Application Information............................................ 20
8.2 Typical Application ................................................. 21
9 Power Supply Recommendations...................... 24
9.1 Bulk Capacitance .................................................... 24
10 Layout................................................................... 25
10.1 Layout Guidelines ................................................. 25
10.2 Layout Example .................................................... 25
11 Device and Documentation Support ................. 26
11.1 Documentation Support ........................................ 26
11.2 Community Resources.......................................... 26
11.3 Trademarks ........................................................... 26
11.4 Electrostatic Discharge Caution ............................ 26
11.5 Glossary ................................................................ 26
12 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (February 2016) to Revision C
Page
• Deleted REG 0x02 from the test conditions of the I_oso1 and I_osi1 parameters in the Electrical Characteristics table ............ 7
• Changed the value of R1 + R2 ≥ 100 KΩ to R1 + R2 ≥ 1 KΩ in the OC_ADJ section. ....................................................... 17
Changes from Revision A (December 2015) to Revision B
Page
• Changed VEN_BUCK in Buck Converter Characteristics From: MIN = 0.9 V and MAX = 1.55 V To: MIN = 1.11 V
and MAX = 1.36 V. ................................................................................................................................................................ 9
Changes from Original (August 2011) to Revision A
Page
• Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
• V_PVDD absolute max voltage rating reduced from 70 V to 65 V ............................................................................................. 5
• Clarification made on how the OCP status bits report in Overcurrent Protection (OCP) and Reporting ............................ 16
• Update to PVDD1 undervoltage protection in Undervoltage Protection (UVLO) describing specific transient brownout
issue. ................................................................................................................................................................................... 17
• Update to EN_GATE pin functional description in EN_GATE clarifying proper EN_GATE reset pulse lengths. ................ 19
• Added gate driver power-up sequencing errata Gate Driver Power Up Sequencing Errdata.............................................. 20
• Added Community Resources ............................................................................................................................................. 24
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