DRV8302_16 Datasheet, PDF (19/32 Pages) Texas Instruments – Three Phase Gate Driver

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DRV8302
SLES267C – AUGUST 2011 – REVISED MARCH 2016
7.4 Device Functional Modes
7.4.1 EN_GATE
EN_GATE low is used to put gate driver, charge pump, current shunt amplifier, and internal regulator blocks into
a low-power consumption mode to save energy. The device will put the MOSFET output stage to high-
impedance mode as long as PVDD is still present.
When the EN_GATE pin goes low to high, it goes through a power-up sequence, and enable gate driver, current
amplifiers, charge pump, internal regulator, and so forth and reset all latched faults related to gate driver block.
All latched faults can be reset when EN_GATE is toggled after an error event unless the fault is still present.
When EN_GATE goes from high to low, it will shut down gate driver block immediately, so gate output can put
external FETs in high impedance mode. It will then wait for 10 µs before completely shutting down the rest of the
blocks. A quick fault reset mode can be done by toggling EN_GATE pin for a very short period (less than 10 µs).
This will prevent the device from shutting down the other functional blocks such as charge pump and internal
regulators and bring a quicker and simple fault recovery. To perform a full reset, EN_GATE should be toggled for
longer than 20 µs. This allows for all of the blocks to completely shut down and reach known states.
An EN_GATE reset pulse (high → low → high) from 10 to 20 µs should not be applied to the EN_GATE pin. The
DRV8301 has a transition area from the quick to full reset modes that can cause the device to become
unresponsive to external inputs until a full power cycle. An RC filter can be added externally to the pin if reset
pulses with this period are expected to occur on the EN_GATE pin.
One exception is to reset a GVDD_OV fault. A quick EN_GATE quick fault reset will not work with GVDD_OV
fault. A complete EN_GATE with low level holding longer than 20 µs is required to reset GVDD_OV fault. TI
highly recommends inspecting the system and board when GVDD_OV occurs.
7.4.2 DTC
Dead time can be programmed through DTC pin. A resistor should be connected from DTC to ground to control
the dead time. Dead time control range is from 50 ns to 500 ns. Short DTC pin to ground provides minimum
dead time (50 ns). Resistor range is 0 to 150 kΩ. Dead time is linearly set over this resistor range. Current shoot-
through prevention protection will be enabled in the device all time independent of dead time setting and input
mode setting.
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