DS90UR908Q_14 Datasheet, PDF (25/33 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II to FPD-Link Converter

DS90UR908Q
www.ti.com
SNLS317H – SEPTEMBER 2009 – REVISED APRIL 2013
APPLICATIONS INFORMATION
DISPLAY APPLICATION
The DS90UR908Q, in conjunction with the DS90UR907Q or DS90UR905Q, is intended for interfacing between a
host (graphics processor) and a Display. It supports an 24-bit color depth (RGB888) and up to 1024 X 768
display formats. In a RGB888 application, 24 color bits (R[7:0], G[7:0], B[7:0]), Pixel Clock (PCLK) and three
control bits (VS, HS and DE) are supported across the serial link with PCLK rates from 5 to 65 MHz. The device
may also be used in 18-bit color applications. In this application three to six general purpose signals may also be
send from host to display.
TYPICAL APPLICATION CONNECTION
Figure 25 shows a typical application of the DS90UR908Q for a 65 MHz XGA Display. The LVDS inputs utilize
100 nF coupling capacitors to the line and the Receiver provides internal termination. Bypass capacitors are
placed near the power supply pins. Ferrite beads are placed on the power lines for effective noise suppression.
1.8V
C11
C8
FB1
C3
FB2
C4
FB3
C5
DS90UR908Q
VDDL
VDDTX
VDDL
VDDA
VDDA
VDDIO
VDDP
VDDSC
3.3V
FB4
C6
C9
C12
FB5
VDDIO
C7
C10
C13
VDDSC
TxCLKOUT+
TxCLKOUT-
Serial
FPD-Link II
Interface
C1
RIN+
RIN-
C2
CMF
C14
TxOUT3+
TxOUT3-
TxOUT2+
TxOUT2-
TxOUT1+
TxOUT1-
TxOUT0+
Host
Control
BISTEN
PDB
R
C15
TxOUT0-
LOCK
PASS
1.8V
10k
RID
C1 - C2 = 0.1 PF (50 WV)
C3 ± C10 = 0.1 PF
C11 - C14 = 4.7 PF
C15 = >10 PF
R = 10 k:
RID (See ID[x] Resistor Value Table)
FB1 - FB5: Impedance = 1 k:
Low DC resistance ( <1:)
ID[X]
SCL
SDA
RES
8 _GND
DAP (GND)
OEN
OSS_SEL
LFMODE
VODSEL
MAPSEL
CONFIG1
CONFIG0
SSC[2]
SSC[1]
SSC[0]
Figure 25. DS90UR908Q Typical Connection Diagram
FPD-Link
Interface
LVDS
100 Ohm
Termination
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