DS90UR908Q_14 Datasheet, PDF (10/33 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II to FPD-Link Converter

DS90UR908Q
SNLS317H – SEPTEMBER 2009 – REVISED APRIL 2013
AC Timing Diagrams and Test Circuits
TxCLKOUT
TxOUT[odd]
TxOUT[even]
Cycle N
Cycle N+1
Figure 2. Checkerboard Data Pattern
+V_OD
-V_OD
+V_OD
-V_OD
+V_OD
-V_OD
80%
t_CLH
20%
t_CHL
Figure 3. LVCMOS Transition Times
V_DDIO
GND
R_IN0-23
DCA, DCB
TxCLKOUT
START
STOP START
STOP START
STOP START
STOP
BIT SYMBOL N BIT BIT SYMBOL N+1 BIT BIT SYMBOL N+2 BIT BIT SYMBOL N+3 BIT
012
2
3
01 2
2
3
012
2
3
012
2
3
t_DD
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TxOUT[3:0]
SYMBOL N-3
SYMBOL N-2
SYMBOL N-1
SYMBOL N
Figure 4. Delay – Latency
PDB
VILmax
RIN
LOCK
PASS
TxCLKOUT
TxOUT[3:0]
X
t_TPDD
Z
Z
Z
Z
Figure 5. FPD-Link & LVCMOS Powerdown Delay
10
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