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DS90UR908Q_14 Datasheet, PDF (15/33 Pages) Texas Instruments – 5 - 65 MHz 24-bit Color FPD-Link II to FPD-Link Converter
DS90UR908Q
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CONFIG1
L
L
H
H
CONFIG0
L
H
L
H
SNLS317H – SEPTEMBER 2009 – REVISED APRIL 2013
Table 1. DS90UR908Q Configuration Modes
Mode
Normal Mode, Control Signal Filter disabled
Normal Mode, Control Signal Filter enabled
Backwards Compatible GEN2
Backwards Compatible GEN1
Des Device
DS90UR907Q, DS90UR905Q
DS90UR907Q, DS90UR905Q
DS90UR241, DS99R421
DS90C241
VIDEO CONTROL SIGNAL FILTER
When operating the devices in Normal Mode, the Video Control Signals (DE, HS, VS) have the following
restrictions:
• Normal Mode with Control Signal Filter Enabled:
– DE and HS — Only 2 transitions per 130 clock cycles are transmitted, the transition pulse must be 3
PCLK or longer.
• Normal Mode with Control Signal Filter Disabled:
– DE and HS — Only 2 transitions per 130 clock cycles are transmitted, no restriction on minimum transition
pulse.
• VS — Only 1 transition per 130 clock cycles are transmitted, minimum pulse width is 130 clock cycles.
Video Control Signals are defined as low frequency signals with limited transitions. Glitches of a control signal
can cause a visual display error. This feature allows for the chipset to validate and filter out any high frequency
noise on the control signals. See Figure 14.
PCLK
IN
HS/VS/DE
IN
Latency
PCLK
OUT
HS/VS/DE
OUT
Pulses 1 or 2
PCLKs wide
Filetered OUT
Figure 14. Video Control Signal Filter Wavefrom
COLOR BIT MAPPING SELECT
The DS90UR908Q can be configured to accept 24-bit color (8-bit RGB) with 2 different mapping schemes: LSBs
on TxOUT[3] shown in Figure 15 or MSBs on TxOUT[3] shown in Figure 16. The user selects which mapping
scheme is controlled by MAPSEL pin or by Register.
Copyright © 2009–2013, Texas Instruments Incorporated
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