AM1707_14 Datasheet, PDF (10/201 Pages) Texas Instruments – Microprocessor

AM1707
SPRS637E – FEBRUARY 2010 – REVISED JUNE 2014
www.ti.com
This device uses ETM9™ version r2p2 and ETB version r0p1. Documentation on the ETM and ETB is
available from ARM Ltd. Reference the ' CoreSight™ ETM9™ Technical Reference Manual, revision r0p1'
and the 'ETM9 Technical Reference Manual, revision r2p2'.
3.3.7 ARM Memory Mapping
By default the ARM has access to most on and off chip memory areas, EMIFA, EMIFB, and the additional
128K byte on chip SRAM. Likewise almost all of the on chip peripherals are accessible to the ARM by
default.
To improve security and/or robustness, the device has extensive memory and peripheral protection units
which can be configured to limit access rights to the various on/off chip resources to specific hosts;
including the ARM as well as other master peripherals. This allows the system tasks to be partitioned
between the ARM and DSP as best suites the particular application; while enhancing the overall
robustness of the solution.
See Table 3-2 for a detailed top level device memory map that includes the ARM memory space.
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