TL16C752B-EP Datasheet, PDF (8/35 Pages) Texas Instruments – 3.3-V DUAL UART WITH 64-BYTE FIFO

TL16C752B-EP
3.3-V DUAL UART WITH 64-BYTE FIFO
SGLS153 – FEBRUARY 2003
functional description (continued)
TX
Xoff1/2 characters are transmitted when the RX FIFO has passed the HALT trigger level programmed in
TCR[3:0].
Xon1/2 characters are transmitted when the RX FIFO reaches the RESUME trigger level programmed in
TCR[7:4].
An important note here is that if, after an xoff character has been sent and software flow control is disabled, the
UART transmits Xon characters automatically to enable normal transmission to proceed. A feature of the
TL16C752B-EP UART design is that if the software flow combination (EFR[3:0]) changes after an Xoff has been
sent, the originally programmed Xon is automatically sent. If the RX FIFO is still above the trigger level, the newly
programmed Xoff1/2 is transmitted.
The transmission of Xoff/Xon(s) follows the exact same protocol as transmission of an ordinary byte from the
FIFO. This means that even if the word length is set to be 5, 6, or 7 characters then the 5, 6, or 7 least significant
bits of Xoff1,2/Xon1,2 is transmitted. (Note that the transmission of 5, 6, or 7 bits of a character is seldom done,
but this functionality is included to maintain compatibility with earlier designs.)
It is assumed that software flow control and hardware flow control are never enabled simultaneously. Figure 4
shows an example of software flow control.
UART 1
UART 2
Transmit
FIFO
Receive
FIFO
Parallel to Serial
Serial to Parallel
Data
Xoff – Xon – Xoff
Serial to Parallel
Parallel to Serial
Xon-1 Word
Xon-1 Word
Xon-2 Word
Xon-2 Word
Xoff-1 Word
Xoff-1 Word
Xoff-1 Word
Compare
Programmed
Xon–Xoff
Characters
Xoff-2 Word
Figure 4. Software Flow Control Example
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