TL16C752B-EP Datasheet, PDF (1/35 Pages) Texas Instruments – 3.3-V DUAL UART WITH 64-BYTE FIFO

TL16C752B-EP
3.3-V DUAL UART WITH 64-BYTE FIFO
D Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
–40°C to 110°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product Change Notification
D Qualification Pedigree^†
D Pin Compatible With ST16C2550 With
Additional Enhancements
D Up to 1.5-Mbps Baud Rate When Using
Crystal (24-MHz Input Clock)
D Up to 3-Mbps Baud Rate When Using
Oscillator or Clock Source (48-MHz Input
Clock)
D 64-Byte Transmit FIFO
D 64-Byte Receive FIFO With Error Flags
D Programmable and Selectable Transmit and
Receive FIFO Trigger Levels for DMA and
Interrupt Generation
D Programmable Receive FIFO Trigger Levels
for Software/Hardware Flow Control
D Software/Hardware Flow Control
– Programmable Xon/Xoff Characters
– Programmable Auto-RTS and Auto-CTS
SGLS153 – FEBRUARY 2003
D Optional Data Flow Resume by Xon Any
Character
D DMA Signaling Capability for Both
Received and Transmitted Data
D Supports 3.3-V Operation
D Software Selectable Baud Rate Generator
D Prescaler Provides Additional Divide By
Four Function
D Fast Access Time 2 Clock Cycle IOR/IOW
Pulse Width
D Programmable Sleep Mode
D Programmable Serial Interface
Characteristics
– 5-, 6-, 7-, or 8-Bit Characters
– Even, Odd, or No Parity Bit Generation
and Detection
– 1, 1.5, or 2 Stop Bit Generation
D False Start Bit Detection
D Complete Status Reporting Capabilities in
Both Normal and Sleep Mode
D Line Break Generation and Detection
D Internal Test and Loopback Capabilities
D Fully Prioritized Interrupt System Controls
D Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and CD)
description
The TL16C752B-EP is a dual-universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs,
automatic hardware/software flow control, and data rates up to 3 Mbps. The TL16C752B-EP offers enhanced
features. It has a transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop
transmission during hardware and software flow control. With the FIFO RDY register, the software gets the
status of TXRDY/RXRDY for all four ports in one access. On-chip status registers provide the user with error
indications, operational status, and modem interface control. System interrupts may be tailored to meet user
requirements. An internal loopback capability allows onboard diagnostics.
The UART transmits data, sent to it over the peripheral 8-bit bus, on the TX signal and receives characters on
the RX signal. Characters can be programmed to be 5, 6, 7, or 8 bits. The UART has a 64-byte receive FIFO
and transmit FIFO and can be programmed to interrupt at different trigger levels. The UART generates its own
desired baud rate based upon a programmable divisor and its input clock. It can transmit even, odd, or no parity
and 1, 1.5, or 2 stop bits. The receiver can detect break, idle, or framing errors, FIFO overflow, and parity errors.
The transmitter can detect FIFO underflow. The UART also contains a software interface for modem control
operations, and has software flow control and hardware flow control capabilities.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
† _{Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.}
This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this
component beyond specified performance and environmental limits.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2003, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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