TL16C554 Datasheet, PDF (7/33 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT

TL16C554, TL16C554I
ASYNCHRONOUS COMMUNICATIONS ELEMENT
SLLS165D – JANUARY 1994 – REVISED JULY 1998
read cycle timing requirements over recommended ranges of operating free-air temperature and
supply voltage (see Figure 4)
MIN MAX UNIT
tw4
tsu1
tsu2
th1
th2
td1
td2
NOTES:
Pulse duration, IOR low
75
ns
Setup time, CSx valid before IOR low (see Note 2)
10
ns
Setup time, A2 – A0 valid before IOR low (see Note 2)
15
ns
Hold time, A2 – A0 valid after IOR high (see Note 2)
0
ns
Hold time, CSx valid after IOR high (see Note 2)
0
ns
Delay time, tsu2 + tw4 + td2 (see Note 3)
Delay time, IOR high to IOR or IOW low
140
ns
50
ns
2. The internal address strobe is always active.
3. In the FIFO mode, td1 = 425 ns (min) between reads of the receiver FIFO and the status registers (interrupt identification register
and line status register).
write cycle timing requirements over recommended ranges of operating free-air temperature and
supply voltage (see Figure 5)
tw5 Pulse duration, IOW↓
tsu3 Setup time, CSx valid before IOW↓ (see Note 2)
tsu4 Setup time, A2 – A0 valid before IOW↓ (see Note 2)
tsu5 Setup time, D7 – D0 valid before IOW↑
th3 Hold time, A2 – A0 valid after IOW↑ (see Note 2)
th4 Hold time, CSx valid after IOW↑ (see Note 2)
th5 Hold time, D7 – D0 valid after IOW↑
td3 Delay time, tsu4 + tw5 + td4
td4 Delay time, IOW↑ to IOW or IOR↓
NOTE 2: The internal address strobe is always active.
MIN MAX UNIT
50
ns
10
ns
15
ns
10
ns
5
ns
5
ns
25
ns
120
ns
55
ns
read cycle switching characteristics over recommended ranges of operating free-air temperature
and supply voltage, C_L = 100 pF (see Note 4 and Figure 4)
PARAMETER
MIN MAX UNIT
ten Enable time, IOR↓ to D7 – D0 valid
tdis Disable time, IOR↑ to D7 – D0 released
NOTE 4: VOL and VOH (and the external loading) determine the charge and discharge time.
30 ns
0
20 ns
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