TL16C554 Datasheet, PDF (12/33 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT

TL16C554, TL16C554I
ASYNCHRONOUS COMMUNICATIONS ELEMENT
SLLS165D – JANUARY 1994 – REVISED JULY 1998
PARAMETER MEASUREMENT INFORMATION
TL16C450 Mode:
SIN
(receiver input data)
Sample Clock
INTx
(data ready or
RCVR ERR)
IOR
Start
Data Bits (5 – 8)
Parity
Stop
td9
50%
50%
tpd4
Active
50%
Figure 9. Receiver Timing Waveforms
RXx
Start _{Data Bits (5 – 8)}
Parity Stop
Sample
Clock
INTx (trigger
interrupt)
(FCR6, 7 = 0, 0)
IOR
(RD RBR)
LSR
Interrupt
IOR
(RD LSR)
50%
td9
50%
tpd4
50% Active
(FIFO at or
above trigger
level)
(FIFO below
trigger level)
50%
tpd4
50% Active
50%
Figure 10. Receiver FIFO First Byte (Sets RDR) Waveforms
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