GC2011A Datasheet, PDF (24/50 Pages) Texas Instruments – 3.3V DIGITAL FILTER CHIP

GC2011A 3.3V DIGITAL FILTER CHIP
SLWS129A
3.8 REAL TO COMPLEX QUADRATURE DOWN CONVERT
The chip can convert from real data to complex data by mixing the data down by F_S/4, low pass filtering the
result and then decimating by a factor of two. The control register settings for this mode are shown in Table 9. The
Table 9: Real To Complex Conversion Mode Control Register Settings
I/O Rates
In
Out
Double
Full
Half
Full
Half
Quarter
Half
Quarter
Symmetr
y
# of Taps
(N)
A-PATH
REG0 REG1
B-PATH
REG0 REG1
Cascade
REG
Latency
Odd
63
24D8 6108 04D8 6181 2000
44
127 248B 2E12 048B 2E91 2000
46
255 2402 0214 0402 0292 2000
50
127 6B8B A218 2B8B A294 2000
46
255 AE02 9018 6E02 9094 2000
50
double rate input mode assumes the even time samples are in the A-path inputs and the odd time samples are the
B-path inputs. The real output is the A-out and the imaginary output is the B-out.
The low pass filter coefficients h(k) are stored so that the even coefficients are stored in the A-path filter cells
and the odd coefficients are stored in the B-path filter cells. The lowpass filter should be designed to cut off frequencies
above F_S/4 for the double to full, full to half, or half to quarter modes, where F_S is the input sample rate. The cut off
frequencies are F_S/8 and F_S/16 for the double to half and double to quarter modes, respectfully.
In the double rate in to full rate out mode the coefficients are stored in register 1 of each filter cell. In this mode
store h(k) in addresses:
128+2*k+1
for k even, and
192+2*k-1
for k odd,
where k ranges from 0 to 31. h(31) is the center tap.
In the double or full rate in to half rate out modes the coefficients are stored in registers 0 and 1 of each filter
cell. In this mode store h(k) in addresses:
128+k
for k modulo 4 = 0
192+k-1
for k modulo 4 = 1
128+k-1
for k modulo 4 = 2
192+k-2
for k modulo 4 = 3
where k ranges from 0 to 63. h(63) is the center tap.
In the double or half rate in to quarter rate out modes the coefficients are stored in registers 0, 1, 2 and 3 of
each filter cell. In this mode store h(k) in addresses:
128+k/2
for k even
192+(k-1)/2
for k odd
where k ranges from 0 to 127. h(127) is the center tap.
Texas Instruments Incorporated
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