5962-1123701VXC Datasheet, PDF (11/25 Pages) Texas Instruments – 16-Mb RADIATION-HARDENED SRAM

SMV512K32-SP
www.ti.com
SLVSA21H – JUNE 2011 – REVISED JULY 2013
Table 5. AC Characteristics Write Cycle ⁽¹⁾ (continued)
SYMBOL
t_GLQX
PARAMETER
GZ-controlled output enable time
t_GLQV
GZ-controlled output data valid
t_GLMX
GZ-controlled error flag enable time
t_GLMV
t_WHMX ⁽⁴⁾
t_WHMV ⁽⁴⁾
GZ-controlled error flag valid
WZ-controlled error flag enable time
WZ-controlled error flag valid
t_EFMZ ⁽⁴⁾
Chip enable change to MBE tri-state
t_WLMZ ⁽⁴⁾
WZ-controlled output MBE tri-state time
(4) Parameters ensured by design and/or characterization if not production tested.
MIN MAX
1.3
UNIT
ns
8.6 ns
3.5
ns
8.6 ns
4
ns
8.5 ns
3.5
5 ns
2 3.3 ns
FIGURE
Figure 9
Figure 12
Figure 9
Figure 12
Figure 9
Figure 12
Figure 9
Figure 12
Figure 7
Figure 10
Figure 7
Figure 10
Figure 7
Figure 9
Figure 10
Figure 12
Figure 7
A[18:0]
t_AVAV
E1Z
E2
t_ETWH
t_WHEF
t_AVWL
t_WLWH
t_WHAX
WZ
DQ[31:0]
MBE
t_WLQZ
t_WHDX
Applied Din
t_DVWH
t_WLMZ
t_WHMX
t_WHWL
t_WHQV
t_EFQZ
t_WHQX
t_WHMV
Valid
t_EFMZ
Valid
Assumption: SCRUBZ high, GZ low
Figure 7. SRAM Write Cycle 1, WZ Controlled Access
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: SMV512K32-SP
Submit Documentation Feedback
11