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5962-1123701VXC Datasheet, PDF (10/25 Pages) Texas Instruments – 16-Mb RADIATION-HARDENED SRAM
SMV512K32-SP
SLVSA21H – JUNE 2011 – REVISED JULY 2013
Table 5. AC Characteristics Write Cycle (1)
SYMBOL
PARAMETER
MIN
MAX
UNIT
tAVAV
Write-through cycle time
20
ns
tAVAV2 (2)
tETWH
tETWH2 (3)
tAVET
Write cycle time with GZ always high
Device enable to end of write (WZ-controlled)
Device enable to end of write (E-controlled)
Address setup time for write (E-controlled)
13.8
ns
12
ns
11
ns
1.4
ns
tEFQZ
E-controlled tri-state time
3.5
5 ns
tAVWL
Address setup time for write (WZ-controlled)
tWLWH
tWHAX (3)
tWHAX1 (2)
tEFAX
tETEF (3)
tETEF1 (2)
Write pulse width
Address hold time for write-through (WZ-controlled)
Address hold time for write (WZ-controlled) with GZ always high
Address hold time for device enable (E-controlled)
Device enable pulse width (E-controlled)
Device enable pulse width (E-controlled) with GZ always high
tDVWH
Data setup time
3.6
ns
7.9
ns
8.5
ns
2.3
ns
0.1
ns
19.5
ns
12.3
ns
8.2
ns
tWHDX
Data hold time
0.2
ns
tWHEF
Write disable time to device disable for write-through
tWHEF1 (2)
tWHWL
tWHWL1 (2)
tWHQX
Write disable time to device disable with GZ always high
Write disable time. Write pulse width high for write-through.
Write disable time. Write pulse width high with GZ always high.
WZ-controlled tri-state end time
tWHQV
WZ-controlled output data valid
tWLQZ
WZ-controlled tri-state time
(1) TC = -55°C to 125°C, VDD1 = 1.7 V to 1.9 V, VDD2 = 3 V to 3.6 V (unless otherwise noted).
(2) Write-only operations with GZ fixed high (no write-through).
(3) Parameters ensured by design and/or characterization if not production tested.
8.5
2.3
12.1
2.6
3
2
ns
ns
ns
ns
ns
10 ns
3.3 ns
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FIGURE
Figure 7
Figure 9
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Figure 11
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Figure 8
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Figure 12
Figure 10
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Figure 12
Figure 7
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Figure 8
Figure 9
Figure 7
Figure 9
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Figure 11
Figure 12
Figure 10
Figure 12
Figure 11
Figure 7
Figure 8
Figure 9
Figure 10
Figure 12
Figure 7
Figure 8
Figure 9
Figure 10
Figure 12
Figure 7
Figure 9
Figure 10
Figure 12
Figure 8
Figure 7
Figure 9
Figure 8
Figure 7
Figure 10
Figure 7
Figure 10
Figure 7
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