LM3S828 Datasheet, PDF (516/526 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

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SSIRIS, type RO, offset 0x018, reset 0x0000.0008 (see page 423)
SSIMIS, type RO, offset 0x01C, reset 0x0000.0000 (see page 424)
TXRIS RXRIS RTRIS RORRIS
SSIICR, type W1C, offset 0x020, reset 0x0000.0000 (see page 425)
TXMIS RXMIS RTMIS RORMIS
SSIPeriphID4, type RO, offset 0xFD0, reset 0x0000.0000 (see page 426)
RTIC RORIC
SSIPeriphID5, type RO, offset 0xFD4, reset 0x0000.0000 (see page 427)
PID4
SSIPeriphID6, type RO, offset 0xFD8, reset 0x0000.0000 (see page 428)
PID5
SSIPeriphID7, type RO, offset 0xFDC, reset 0x0000.0000 (see page 429)
PID6
SSIPeriphID0, type RO, offset 0xFE0, reset 0x0000.0022 (see page 430)
PID7
SSIPeriphID1, type RO, offset 0xFE4, reset 0x0000.0000 (see page 431)
PID0
SSIPeriphID2, type RO, offset 0xFE8, reset 0x0000.0018 (see page 432)
PID1
SSIPeriphID3, type RO, offset 0xFEC, reset 0x0000.0001 (see page 433)
PID2
SSIPCellID0, type RO, offset 0xFF0, reset 0x0000.000D (see page 434)
PID3
SSIPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0 (see page 435)
CID0
SSIPCellID2, type RO, offset 0xFF8, reset 0x0000.0005 (see page 436)
CID1
SSIPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1 (see page 437)
CID2
CID3
Inter-Integrated Circuit (I²C) Interface
I²C Master
I2C 0 base: 0x4002.0000
I2CMSA, type R/W, offset 0x000, reset 0x0000.0000
SA
R/S
516
June 18, 2012
Texas Instruments-Production Data