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LM3S828 Datasheet, PDF (480/526 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark
Signal Tables
Table 15-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Typea Description
VDD
7
-
Power Positive supply for I/O and some logic.
15
23
32
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
15.3 Signals by Function, Except for GPIO
Table 15-3. Signals by Function, Except for GPIO
Function
ADC
General-Purpose
Timers
I2C
JTAG/SWD/SWO
Power
Pin Name
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
CCP0
CCP1
CCP2
CCP3
CCP4
CCP5
I2CSCL
I2CSDA
SWCLK
SWDIO
SWO
TCK
TDI
TDO
TMS
TRST
GND
LDO
Pin Number
1
2
3
4
48
47
46
45
29
13
30
12
11
43
33
34
40
39
37
40
38
37
39
41
8
16
24
31
6
Pin Type
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
O
I
I
O
I/O
I
-
-
VDD
7
-
15
23
32
Buffer Typea
Description
Analog Analog-to-digital converter input 0.
Analog Analog-to-digital converter input 1.
Analog Analog-to-digital converter input 2.
Analog Analog-to-digital converter input 3.
Analog Analog-to-digital converter input 4.
Analog Analog-to-digital converter input 5.
Analog Analog-to-digital converter input 6.
Analog Analog-to-digital converter input 7.
TTL
Capture/Compare/PWM 0.
TTL
Capture/Compare/PWM 1.
TTL
Capture/Compare/PWM 2.
TTL
Capture/Compare/PWM 3.
TTL
Capture/Compare/PWM 4.
TTL
Capture/Compare/PWM 5.
OD
I2C clock.
OD
I2C data.
TTL
JTAG/SWD CLK.
TTL
JTAG TMS and SWDIO.
TTL
JTAG TDO and SWO.
TTL
JTAG/SWD CLK.
TTL
JTAG TDI.
TTL
JTAG TDO and SWO.
TTL
JTAG TMS and SWDIO.
TTL
JTAG TRST.
Power Ground reference for logic and I/O pins.
Power
Power
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater.
Positive supply for I/O and some logic.
480
June 18, 2012
Texas Instruments-Production Data