LM3S828 Datasheet, PDF (3/526 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S828 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 19
About This Document .................................................................................................................... 23
Audience .............................................................................................................................................. 23
About This Manual ................................................................................................................................ 23
Related Documents ............................................................................................................................... 23
Documentation Conventions .................................................................................................................. 24
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.4.9
Architectural Overview .......................................................................................... 26
Product Features .......................................................................................................... 26
Target Applications ........................................................................................................ 32
High-Level Block Diagram ............................................................................................. 32
Functional Overview ...................................................................................................... 34
ARM Cortex™-M3 ......................................................................................................... 34
Motor Control Peripherals .............................................................................................. 35
Analog Peripherals ........................................................................................................ 35
Serial Communications Peripherals ................................................................................ 35
System Peripherals ....................................................................................................... 37
Memory Peripherals ...................................................................................................... 37
Additional Features ....................................................................................................... 38
Hardware Details .......................................................................................................... 38
System Block Diagram .................................................................................................. 39
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
The Cortex-M3 Processor ...................................................................................... 40
Block Diagram .............................................................................................................. 41
Overview ...................................................................................................................... 42
System-Level Interface .................................................................................................. 42
Integrated Configurable Debug ...................................................................................... 42
Trace Port Interface Unit (TPIU) ..................................................................................... 43
Cortex-M3 System Component Details ........................................................................... 43
Programming Model ...................................................................................................... 44
Processor Mode and Privilege Levels for Software Execution ........................................... 44
Stacks .......................................................................................................................... 44
Register Map ................................................................................................................ 45
Register Descriptions .................................................................................................... 46
Exceptions and Interrupts .............................................................................................. 59
Data Types ................................................................................................................... 59
Memory Model .............................................................................................................. 59
Memory Regions, Types and Attributes ........................................................................... 60
Memory System Ordering of Memory Accesses .............................................................. 61
Behavior of Memory Accesses ....................................................................................... 61
Software Ordering of Memory Accesses ......................................................................... 62
Bit-Banding ................................................................................................................... 63
Data Storage ................................................................................................................ 65
Synchronization Primitives ............................................................................................. 66
Exception Model ........................................................................................................... 67
Exception States ........................................................................................................... 68
Exception Types ............................................................................................................ 68
June 18, 2012
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