SMH4804 Datasheet, PDF (4/41 Pages) Summit Microelectronics, Inc. – -48V Programmable Hot Swap Sequencing Power Controller

Functional Description
SMH4804
2.5V for a period of at least t_PDD (Pin Detect Delay time)_.
The t_PDD filter helps prevent spurious start-up sequences
while the card is being inserted. If UV falls below 2.5V or OV
rises above 2.5V, the PG[4:1]# and VGATE outputs are
disabled immediately.
Under-/Over-Voltage Filtering
The SMH4804 can be configured so that an out-of-
tolerance condition on UV/OV does not shut off the output
immediately. Instead, a filter delay may be inserted so that
only sustained under-voltage or over-voltage conditions can
shut off the output. An out-of-tolerance condition on UV/OV
for longer than the filter delay time (t_UOFLTR in Figure 3)
causes the VGATE and PG[4:1]# outputs to shut off when
the UV/OV filter option is enabled using bits 2:1 of Register
4. The under-/over-voltage filtering feature is disabled (bits
2:1 = 00) in the default configuration. Refer to Register 4 -
Address 0100 on page 33 for more information on the filter
delay options. The UV and OV filters are enabled and
disabled by programming bits 3 and 2 of Register 6
respectively. Refer to Register 6 - Address 0110 on page 36
for more information. Note that the delay values in Register
4 are only valid if the corresponding over or under voltage
filtering is enabled using bits 3:2 of Register 6.
Figure 3 shows the timing for the under-/over-voltage filter.
2.5V
OV / UV
t_UOFLTR
FAULT#
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Figure 3. Under-/Over-Voltage Filter Timing
Under-/Over-Voltage Latching
An additional option for an out-of-tolerance condition on UV/
OV is to latch the VGATE and PG[4:1]# outputs off such that
a return to normal UV/OV operation does not turn them back
on. In this case the FAULT# output is asserted.
Under-Voltage Hysteresis
The Under-Voltage comparator input may be configured
with a programmable level of hysteresis using Register 7.
The falling voltage compare level may be set in steps of
62.5mV below 2.5V. The rising voltage compare level is
fixed at 2.5V. The default under-voltage hysteresis level is
set to 62.5mV. In default conditions the SMH4804 is not in
an under-voltage state once the UV voltage rises above
2.5V; and after that an under-voltage occurrence is not
recognized until the UV voltage falls below 2.4375V (2.5V –
62.5mV).
Soft Start Slew Rate Control
Once all of the preconditions for powering up the DC/DC
controllers have been met as explained in the previous
sections, the SMH4804 provides a means to soft start the
external power MOSFET. It is important to limit in-rush
current to prevent damage to the add-in card or disruptions
to the host power supply. For example, charging the filter
capacitance too quickly (normally required at the input of the
DC/DC controllers) may generate very high current. The
VGATE output of the SMH4804 is current limited to I_VGATE,
allowing the slew rate to be easily modified using external
passive components. The slew rate may be found by
dividing I_VGATE by the gate-to-drain capacitance placed on
the external FET.
Load Control — Sequencing the Secondary
Supplies
The PG1# through PG4# output pins are used to enable the
external DC/DC controllers. Once the card is inserted, the
SMH4804 samples the PD1# and PD2# pin detect input
pins to determine if the card as been inserted properly. It
then monitors the state of the UV and OV input pins to
assure there is no under-voltage or over-voltage condition
present. Once these conditions are met, and the EN/TS pin
is greater than 2.5V, the SMH4804 asserts the VGATE
output to turn on the external MOSFET.
During the time it takes to turn the MOSFET on, the
SMH4804 monitors the system for an over-current condition
via the CBSENSE input pin. In addition, the device internally
monitors the voltage level on the VGATE output pin. This is
shown by the ‘VGATE Sense’ block in Figure 2.
Once power has been ramped to the DC/DC controllers, two
conditions must be met before the PG[4:1]# outputs can be
enabled:
• the DRAIN SENSE input voltage must be below 2.5V.
• the VGATE voltage must be greater than V_DD – V_GT,
where V_GT is the gate threshold.
The DRAIN SENSE input helps ensure that the power
MOSFET is not absorbing too much steady state power
from operating at a high V_DS. This sensor remains active at
all times (except when current regulation is enabled). The
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2050 3.7 10/30/02
Summit Microelectronics