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SMH4804 Datasheet, PDF (36/41 Pages) Summit Microelectronics, Inc. – -48V Programmable Hot Swap Sequencing Power Controller
Registers
SMH4804
Register 6 - Address 0110
This register enables what events are recorded in the nonvolatile fault latch if bit 3 of R5 is cleared. The high
order bits of this register control whether the under and over voltage pins are filtered, and the two low order bits
program the current regulation time period.
Bits
Default R/W
Description
3210
0
When bit 3 is cleared, the under voltage is filtered.
0b1 R/W
1
When bit 3 is set, the under voltage is not filtered.
0
When bit 2 is cleared, the over voltage is filtered.
0b1 R/W
1
When bit 2 is set, the over voltage is not filtered.
00
When bits 1:0 are set to 0b00, the current regulation is turned
off.
0 1 0b00 R/W When bits 1:0 are set to 0b01, the current regulation is 5 ms.
10
When bits 1:0 are set to 0b10, the current regulation is 80 ms.
11
When bits 1:0 are set to 0b11, the current regulation is 160 ms.
Table 7. Register 6 Bitmap
Register 7 - Address 0111
This register controls the UV hysteresis. The values shown are with respect to VSS.
Bits
Default R/W
Description
3210
1
0b1 R/W In this register, bit 3 is always set.
000
When bits 2:0 are 0b000, the UV hysteresis = 0.0 volts.
001
When bits 2:0 are 0b001, the UV hysteresis = 0.0625 volts.
010
When bits 2:0 are 0b010, the UV hysteresis = 0.125 volts.
011
When bits 2:0 are 0b011, the UV hysteresis = 0.1785 volts.
1
0b001 R/W
100
When bits 2:0 are 0b100, the UV hysteresis = 0.250 volts.
100
When bits 2:0 are 0b101, the UV hysteresis = 0.3125 volts.
110
When bits 2:0 are 0b110, the UV hysteresis = 0.375 volts.
111
When bits 2:0 are 0b111, the UV hysteresis = 0.4375 volts.
Table 8. Register 7 Bitmap
36
2050 3.7 10/30/02
Summit Microelectronics