SMH4804 Datasheet, PDF (35/41 Pages) Summit Microelectronics, Inc. – -48V Programmable Hot Swap Sequencing Power Controller

SMH4804
Registers
One last event mode, 000_BIN, disables the cascade effect and sets up PG4# going true as the trigger event. FS#
must be pulled high before t_PGD elapses, or VGATE and all of the PG[4:1]# outputs are disabled.
Cascade enabled:
ENPGA enables PG2#, PG3# and PG4#;
ENPGB enables PG3# and PG4#;
ENPGC enables PG4#.
Cascade disabled:
ENPGA enables PG2#;
ENPGB enables PG3#;
ENPGC enables PG4#.
Simultaneous:
PG1#, PG2#, PG3# and PG4# operate independently from one another.
Sequenced:
PG1#, PG2#, PG3# and PG4# are dependent upon activation of PG(N–1) — for N = 2, 3, and 4 — plus a
programmable PG delay.p=On
Summit Microelectronics
2050 3.7 10/30/02
35