SMH4804 Datasheet, PDF (13/41 Pages) Summit Microelectronics, Inc. – -48V Programmable Hot Swap Sequencing Power Controller

SMH4804
Pin Descriptions
Pin Number Pin Number
(28-Pin SOIC) (48-Pin TQFP)
26
37
27
40
28
42
Pin Type
(I/O)
Pin Name
Description
O
PG2#
The PG2# output is an open-drain, active low signal
with no internal pull-up resistor. This pin can be used
to switch a load or enable a DC/DC converter. PG1#
is enabled immediately after VGATE reaches V_DD -
V_GT and the DRAIN SENSE voltage is less than 2.5V.
Each successive PGn# output (PG2# → PG3# →
PG4#) is enabled t_PGD after its predecessor, provided
that the ENPGx inputs are high. The voltage on this
pin cannot exceed 12V relative to V_SS. ENPGx refers
to the ENPGA, ENPGB, and ENPGC inputs.
O
PG4#
The PG4# output is an open-drain, active low signal
with no internal pull-up resistor. This pin can be used
to switch a load or enable a DC/DC converter. PG1#
is enabled immediately after VGATE reaches V_DD -
V_GT and the DRAIN SENSE voltage is less than 2.5V.
Each successive PGn# output (PG2# → PG3# →
PG4#) is enabled t_PGD after its predecessor, provided
that the ENPGx inputs are high. The voltage on this
pin cannot exceed 12V relative to V_SS. ENPGx refers
to the ENPGA, ENPGB, and ENPGC inputs.
I
VDD
This is the positive supply input. An internal shunt
regulator limits the voltage on this pin to approximately
12V with respect to V_SS. A resistor must be placed in
series with the V_DD pin to limit the regulator current
(R_D in the application illustrations).
Table 1. SMH4804 Pin Descriptions (Continued)
Summit Microelectronics
2050 3.7 10/30/02
13