LSM303AGR Datasheet, PDF (61/68 Pages) STMicroelectronics – ultra-low-power 3D accelerometer and 3D magnetometer

LSM303AGR
ODR1
0
0
1
1
MD1
0
0
1
1
Register description
Table 92. Output data rate configuration
ODR0
ODR (Hz)
0
10 (default)
1
20
0
20
1
100
MD0
0
1
0
1
Table 93. System mode
Mode
Continuous mode. In continuous mode the device continuously
performs measurements and places the result in the data register.
The data-ready signal is generated when a new data set is ready to
be read. This signal can be available on the external pin by setting
the INT_MAG bit in CFG_REG_C_M (62h).
Single mode. When single mode is selected, the device performs a
single measurement, sets DRDY high and returns to idle mode.
Mode register return to idle mode bit values.
Idle mode. Device is placed in idle mode. I²C and SPI active.
Idle mode. Device is placed in idle mode. I²C and SPI active.
8.40
CFG_REG_B_M (61h)
Table 94. CFG_REG_B_M register
0
0
0
0
INT_on_
DataOFF
Set_FREQ
OFF_CANC
LPF
INT_on_
DataOFF
Set_FREQ
OFF_CANC
LPF
Table 95. CFG_REG_B_M register description
If ‘1’, the interrupt block recognition checks data after the hard-iron correction to
discover the interrrupt.
Selects the frequency of the set pulse.
0: set pulse is released every 63 ODR; 1: set pulse is release only at power-on
after PD condition.
Enables offset cancellation.
Low-pass filter enable (see Table 96)
0: digital filter disabled; 1: digital filter enabled
Table 96. Digital low-pass filter
CFG_REG_B[LPF]
BW [Hz]
0 (disable)
ODR/2
1 (enable)
ODR/4
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