LSM303AGR Datasheet, PDF (51/68 Pages) STMicroelectronics – ultra-low-power 3D accelerometer and 3D magnetometer

LSM303AGR
Register description
8.17 FIFO_CTRL_REG_A (2Eh)
Table 51. FIFO_CTRL_REG_A register
FM1
FM0
TR
FTH4
FTH3
FTH2
FTH1
FTH0
FM[1:0]
TR
FTH[4:0]
Table 52. FIFO_CTRL_REG_A description
FIFO mode selection. Default value: 00 (see Table 53)
Trigger selection. Default value: 0
0: trigger event allows triggering signal on INT1
1: trigger event allows triggering signal on INT2
Default value: 00000
FM1
0
0
1
1
Table 53. FIFO mode configuration
FM0
0
1
0
1
FIFO mode
Bypass mode
FIFO mode
Stream mode
Stream-to-FIFO mode
8.18
FIFO_SRC_REG_A (2Fh)
WTM
OVRN_FIFO
Table 54. FIFO_SRC_REG_A register
EMPTY
FSS4
FSS3
FSS2
FSS1
FSS0
WTM
OVRN_FIFO
EMPTY
FSS [4:0]
Table 55. FIFO_SRC_REG_A description
WTM bit is set high when FIFO content exceeds watermark level.
OVRN bit is set high when FIFO buffer is full; this means that the FIFO buffer
contains 32 unread samples. At the following ODR a new sample set replaces the
oldest FIFO value. The OVRN bit is set to 0 when the first sample set has been
read.
EMPTY flag is set high when all FIFO samples have been read and FIFO is empty.
FSS [4:0] field always contains the current number of unread samples stored in the
FIFO buffer. When FIFO is enabled, this value increases at ODR frequency until
the buffer is full, whereas, it decreases every time one sample set is retrieved from
FIFO.
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