STE2004S Datasheet, PDF (6/79 Pages) STMicroelectronics – 102 x 65 single-chip LCD controller/driver

Pin description
STE2004S
Table 1. Pin description (continued)
N°
Pad
Type
Function
SCLK - SCL
SDA_OUT
SA0
SA1
DB0 to DB7
181
178
149
148
182-189
R/W - RD
175
E / WR
176
E / WR
176
RES
172
D/C
174
CS
173
TEST_MODE
191
TEST_VREF
146
I SCLK - Serial and SPI interface clock - cannot be left floating
I SCL - I²C bus clock - cannot be left floating
O I²C Bus data out - if unused must be left floating
I I²C slave address BIT 0 - cannot be left floating
I I²C slave address BIT 1- cannot be left floating
I/O Parallel interface 8 bit data bus - cannot be left floating
R/W - 68000 Series Parallel interface read and write control input
I
- cannot be left floating
RD - 8080 Series Parallel interface read enable clock input
I
- cannot be left floating
E - 68000 Series Parallel interface read and write clock input
I
- cannot be left floating
WR - 8080 Series Parallel interface - write enable clock input
I
- cannot be left floating
I Reset input. Active Low.
I Interface data/command selector- cannot be left floating
I
Serial and Parallel interfaces ENABLE. When Low the incoming data are
clocked In. Cannot be left floating
I Test Pad - 50 kohm internal pull-down must be connected to VSS/VSSAUX
O Test Pad - must be left floating
Oscillator Input:
OSC_IN
Configuration
OSCIN
144
I
High
Low
External Oscillator
Internal oscillator enabled
Internal oscillator disabled
Internal oscillator disabled
OSCOUT
FR_OUT
FR_IN
M/S
210
O Internal/external oscillator out - if unused must be left floating
211
O Master slave frame inversion synchronization - f unused must be left floating
143
I Master slave frame inversion synchronization - cannot be left floating
Master/slave configuration bit:- cannot be left floating
M/S PIN OSC_OUT FR_OUT FR_IN
Charge Pump
100
I
High ENABLED Enabled Disabled AuxVsense disabled
Low
ENABLED Enabled
Enabled
Charge pump in slave
mode or ext power
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