STE2004S Datasheet, PDF (4/79 Pages) STMicroelectronics – 102 x 65 single-chip LCD controller/driver

Block diagram
1
Block diagram
STE2004S
Figure 1. STE2004S block diagram
CO to C101
R0 to R64
OSC_IN
OSC_OUT
FR_IN
FR_OUT
VSENSE SLAVE
VLCD
VLCDSENSE
RES
VSSAUX
VDD1,2
V_SS
OSC
MASTER
SLAVE SYNC
BIAS VOLTAGE
GENERATOR
TIMING
GENERATOR
CLOCK
COLUMN
DRIVERS
DATA
LATCHES
ROW
DRIVERS
SHIFT
REGISTER
HIGH VOLTAGE
GENERATOR
RESET
DATA
REGISTER
65 x 102
RAM
SCROLL
LOGIC
TEST
INSTRUCTION
REGISTER
DISPLAY
CONTROL
LOGIC
I2C BUS 9 Bit SERIAL 3 & 4 Line SPI Parallel 8080 Parallel 68K
TEST_MODE
TEST_VREF
ICON_MODE
EXT
SEL 3
SEL 2
SEL 1
SA1 SAO SDOUT SCLK/SCL SDIN/SDA_IN SDA_OUT DB0 E/WR R/W- RD D/C CS
to
DB7
LR0047
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